nrf9160 SPI slave issues (SDK version 1.4.0)

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

Simon — Thu, 15 Apr 2021 07:55:46 GMT

I got a tips from a colleague about disabling csn, try to set it to disable in the overlay file: 0xFFFFFFFF. Using /delete-property/ may also work. For generic Zephyr question you can also get some help in any of these resources: https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.5.0/zephyr/introduction/index.html#resources

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

Simon — Fri, 09 Apr 2021 11:41:13 GMT

Thanks, I'll try to put off some time on Monday and do some debugging.

Regarding this question:

[quote user="plotkin1996"]Also: the SPIS seems to use about 40µA while idle. Is this expected, or is there some way to reduce consumption without taking SPIS down completely?[/quote]

I just provided an answer to something similar in a private case, I'll copy in some snippets from the conversation:

"I found this from another private ticket:

"We don’t have any SPIS current consumption numbers for nRF9160 available at hand, but I expect it to be in the same ballpark as the nRF52-series. Some numbers for the nRF52832 can be found here, i.e, the “Idle current for SPIS (STARTed, no CSN activity) is only 1 µA. (During a transfer it will be higher (+HFCLK is requested during the transfer), but it will go back to idle when CSN pin is de-asserted)."

So it seems like the HFCLK will get automatically releasesed by the peripheral when CSN is de-asserted.

If the current is still high after CSN is de-asserted, the peripheral may have not released the HFCLK (there may be different reasons for this, e.g. for the nrf52832)."

"I talked to another colleague and got some more insight into this. He confirmed the information I gave you about HFCLK being requested/released when CSN is asserted/de-aserted. You don't need to to anything to make this happen, as it is something that happens automatically in the hardware. Different peripherals will request/release the HFCKL differently, and the PMU will handle all these requests and turn the clock on/off."

"Since SPI requests the HFCKL every time CSN gets asserted, some delay must be expected, since it has to wait for the HF clock to ramp up. The best solution (if possible) is to assert the CSN pin a bit earlier from the master side, so the slave gets more time to wake up. You could also set NRF_POWER->TASKS_CONSTLAT in the start of the program, that would decrease the latency, but increase the current. Check this case for more information"

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

plotkin1996 — Fri, 09 Apr 2021 07:18:25 GMT

devzone.nordicsemi.com/.../7801.SPIS.zip

Was away yesterday, here it is.

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

Simon — Thu, 08 Apr 2021 09:41:30 GMT

Would you be able to upload the SPIS example in zipped format. I'm not too familiar with the SPI slave, and it would be useful to test this out myself and do some debugging.

Best regards,

Simon

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

plotkin1996 — Tue, 06 Apr 2021 15:10:38 GMT

It works on a custom board, but not on DK (even if I use custom device tree with corrected pins on a DK). Tried different pins, SPI1/SPI3 - same result. Here is the generated zephyr.dts (this one is for SPIS3):

/dts-v1/;

/ {
	#address-cells = < 0x1 >;
	#size-cells = < 0x1 >;
	model = "Nordic nRF9160 DK NRF9160";
	compatible = "nordic,nrf9160-dk-nrf9160";
	chosen {
		zephyr,flash-controller = &flash_controller;
		zephyr,entropy = &cryptocell_sw;
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,uart-mcumgr = &uart0;
		zephyr,flash = &flash0;
		zephyr,sram = &sram0_ns;
		zephyr,code-partition = &slot0_ns_partition;
	};
	aliases {
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		led3 = &led3;
		pwm-led0 = &pwm_led0;
		sw0 = &button2;
		sw1 = &button3;
		sw2 = &button0;
		sw3 = &button1;
	};
	soc {
		#address-cells = < 0x1 >;
		#size-cells = < 0x1 >;
		compatible = "nordic,nRF9160-SICA", "nordic,nRF9160", "nordic,nRF91", "simple-bus";
		interrupt-parent = < &nvic >;
		ranges;
		nvic: interrupt-controller@e000e100 {
			compatible = "arm,v8m-nvic";
			reg = < 0xe000e100 0xc00 >;
			interrupt-controller;
			#interrupt-cells = < 0x2 >;
			arm,num-irq-priority-bits = < 0x3 >;
			phandle = < 0x1 >;
		};
		systick: timer@e000e010 {
			compatible = "arm,armv8m-systick";
			reg = < 0xe000e010 0x10 >;
			status = "disabled";
		};
		sram0: memory@20000000 {
			compatible = "mmio-sram";
			reg = < 0x20000000 0x40000 >;
		};
		peripheral@40000000 {
			#address-cells = < 0x1 >;
			#size-cells = < 0x1 >;
			ranges = < 0x0 0x40000000 0x10000000 >;
			flash_controller: flash-controller@39000 {
				compatible = "nordic,nrf91-flash-controller";
				reg = < 0x39000 0x1000 >;
				#address-cells = < 0x1 >;
				#size-cells = < 0x1 >;
				label = "NRF_FLASH_DRV_NAME";
				flash0: flash@0 {
					compatible = "soc-nv-flash";
					label = "NRF_FLASH";
					erase-block-size = < 0x1000 >;
					write-block-size = < 0x4 >;
					reg = < 0x0 0x100000 >;
					partitions {
						compatible = "fixed-partitions";
						#address-cells = < 0x1 >;
						#size-cells = < 0x1 >;
						boot_partition: partition@0 {
							label = "mcuboot";
							reg = < 0x0 0x10000 >;
						};
						slot0_partition: partition@10000 {
							label = "image-0";
							reg = < 0x10000 0x40000 >;
						};
						slot0_ns_partition: partition@50000 {
							label = "image-0-nonsecure";
							reg = < 0x50000 0x30000 >;
						};
						slot1_partition: partition@80000 {
							label = "image-1";
							reg = < 0x80000 0x40000 >;
						};
						slot1_ns_partition: partition@c0000 {
							label = "image-1-nonsecure";
							reg = < 0xc0000 0x30000 >;
						};
						scratch_partition: partition@f0000 {
							label = "image-scratch";
							reg = < 0xf0000 0xa000 >;
						};
						storage_partition: partition@fa000 {
							label = "storage";
							reg = < 0xfa000 0x6000 >;
						};
					};
				};
			};
			adc: adc@e000 {
				compatible = "nordic,nrf-saadc";
				reg = < 0xe000 0x1000 >;
				interrupts = < 0xe 0x1 >;
				status = "okay";
				label = "ADC_0";
				#io-channel-cells = < 0x1 >;
			};
			dppic: dppic@17000 {
				compatible = "nordic,nrf-dppic";
				reg = < 0x17000 0x1000 >;
				status = "okay";
				label = "DPPIC";
			};
			egu0: egu@1b000 {
				compatible = "nordic,nrf-egu";
				reg = < 0x1b000 0x1000 >;
				interrupts = < 0x1b 0x1 >;
				status = "okay";
			};
			egu1: egu@1c000 {
				compatible = "nordic,nrf-egu";
				reg = < 0x1c000 0x1000 >;
				interrupts = < 0x1c 0x1 >;
				status = "okay";
			};
			egu2: egu@1d000 {
				compatible = "nordic,nrf-egu";
				reg = < 0x1d000 0x1000 >;
				interrupts = < 0x1d 0x1 >;
				status = "okay";
			};
			egu3: egu@1e000 {
				compatible = "nordic,nrf-egu";
				reg = < 0x1e000 0x1000 >;
				interrupts = < 0x1e 0x1 >;
				status = "okay";
			};
			egu4: egu@1f000 {
				compatible = "nordic,nrf-egu";
				reg = < 0x1f000 0x1000 >;
				interrupts = < 0x1f 0x1 >;
				status = "okay";
			};
			egu5: egu@20000 {
				compatible = "nordic,nrf-egu";
				reg = < 0x20000 0x1000 >;
				interrupts = < 0x20 0x1 >;
				status = "okay";
			};
			i2s0: i2s@28000 {
				compatible = "nordic,nrf-i2s";
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0x28000 0x1000 >;
				interrupts = < 0x28 0x1 >;
				status = "disabled";
				label = "I2S_0";
			};
			kmu: kmu@39000 {
				compatible = "nordic,nrf-kmu";
				reg = < 0x39000 0x1000 >;
				interrupts = < 0x39 0x1 >;
				status = "okay";
			};
			pdm0: pdm@26000 {
				compatible = "nordic,nrf-pdm";
				reg = < 0x26000 0x1000 >;
				interrupts = < 0x26 0x1 >;
				status = "disabled";
				label = "PDM_0";
			};
			regulators: regulator@4000 {
				compatible = "nordic,nrf-regulators";
				reg = < 0x4000 0x1000 >;
				status = "okay";
			};
			vmc: vmc@3a000 {
				compatible = "nordic,nrf-vmc";
				reg = < 0x3a000 0x1000 >;
				status = "okay";
			};
			uart0: uart@8000 {
				compatible = "nordic,nrf-uarte";
				reg = < 0x8000 0x1000 >;
				interrupts = < 0x8 0x1 >;
				status = "okay";
				label = "UART_0";
				current-speed = < 0x1c200 >;
				tx-pin = < 0x1d >;
				rx-pin = < 0x1c >;
				rts-pin = < 0x1b >;
				cts-pin = < 0x1a >;
			};
			uart1: uart@9000 {
				compatible = "nordic,nrf-uarte";
				reg = < 0x9000 0x1000 >;
				interrupts = < 0x9 0x1 >;
				status = "okay";
				label = "UART_1";
				current-speed = < 0x1c200 >;
				tx-pin = < 0x1 >;
				rx-pin = < 0x0 >;
				rts-pin = < 0xe >;
				cts-pin = < 0xf >;
			};
			uart2: uart@a000 {
				compatible = "nordic,nrf-uarte";
				reg = < 0xa000 0x1000 >;
				interrupts = < 0xa 0x1 >;
				status = "disabled";
				label = "UART_2";
				tx-pin = < 0x18 >;
				rx-pin = < 0x17 >;
			};
			uart3: uart@b000 {
				compatible = "nordic,nrf-uarte";
				reg = < 0xb000 0x1000 >;
				interrupts = < 0xb 0x1 >;
				status = "disabled";
				label = "UART_3";
			};
			i2c0: i2c@8000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0x8000 0x1000 >;
				clock-frequency = < 0x186a0 >;
				interrupts = < 0x8 0x1 >;
				status = "disabled";
				label = "I2C_0";
			};
			i2c1: i2c@9000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0x9000 0x1000 >;
				clock-frequency = < 0x186a0 >;
				interrupts = < 0x9 0x1 >;
				status = "disabled";
				label = "I2C_1";
			};
			i2c2: i2c@a000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0xa000 0x1000 >;
				clock-frequency = < 0x186a0 >;
				interrupts = < 0xa 0x1 >;
				status = "okay";
				label = "I2C_2";
				compatible = "nordic,nrf-twim";
				sda-gpios = < &gpio0 0x1e 0x0 >;
				scl-gpios = < &gpio0 0x1f 0x0 >;
			};
			i2c3: i2c@b000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0xb000 0x1000 >;
				clock-frequency = < 0x186a0 >;
				interrupts = < 0xb 0x1 >;
				status = "disabled";
				label = "I2C_3";
			};
			spi0: spi@8000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0x8000 0x1000 >;
				interrupts = < 0x8 0x1 >;
				status = "disabled";
				label = "SPI_0";
			};
			spi1: spi@9000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0x9000 0x1000 >;
				interrupts = < 0x9 0x1 >;
				status = "disabled";
				label = "SPI_1";
			};
			spi2: spi@a000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0xa000 0x1000 >;
				interrupts = < 0xa 0x1 >;
				status = "disabled";
				label = "SPI_2";
			};
			spi3: spi@b000 {
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				reg = < 0xb000 0x1000 >;
				interrupts = < 0xb 0x1 >;
				status = "okay";
				label = "SPI_3";
				compatible = "nordic,nrf-spis";
				sck-pin = < 0xd >;
				mosi-pin = < 0xc >;
				miso-pin = < 0xb >;
				csn-pin = < 0xa >;
				def-char = < 0xaa >;
			};
			pwm0: pwm@21000 {
				compatible = "nordic,nrf-pwm";
				reg = < 0x21000 0x1000 >;
				interrupts = < 0x21 0x1 >;
				status = "okay";
				label = "PWM_0";
				#pwm-cells = < 0x1 >;
				ch0-pin = < 0x2 >;
				phandle = < 0x3 >;
			};
			pwm1: pwm@22000 {
				compatible = "nordic,nrf-pwm";
				reg = < 0x22000 0x1000 >;
				interrupts = < 0x22 0x1 >;
				status = "disabled";
				label = "PWM_1";
				#pwm-cells = < 0x1 >;
			};
			pwm2: pwm@23000 {
				compatible = "nordic,nrf-pwm";
				reg = < 0x23000 0x1000 >;
				interrupts = < 0x23 0x1 >;
				status = "disabled";
				label = "PWM_2";
				#pwm-cells = < 0x1 >;
			};
			pwm3: pwm@24000 {
				compatible = "nordic,nrf-pwm";
				reg = < 0x24000 0x1000 >;
				interrupts = < 0x24 0x1 >;
				status = "disabled";
				label = "PWM_3";
				#pwm-cells = < 0x1 >;
			};
			gpio0: gpio@842500 {
				compatible = "nordic,nrf-gpio";
				gpio-controller;
				reg = < 0x842500 0x300 >;
				#gpio-cells = < 0x2 >;
				label = "GPIO_0";
				status = "okay";
				port = < 0x0 >;
				phandle = < 0x2 >;
			};
			rtc0: rtc@14000 {
				compatible = "nordic,nrf-rtc";
				reg = < 0x14000 0x1000 >;
				cc-num = < 0x4 >;
				interrupts = < 0x14 0x1 >;
				status = "okay";
				clock-frequency = < 0x8000 >;
				prescaler = < 0x1 >;
				label = "RTC_0";
			};
			rtc1: rtc@15000 {
				compatible = "nordic,nrf-rtc";
				reg = < 0x15000 0x1000 >;
				cc-num = < 0x4 >;
				interrupts = < 0x15 0x1 >;
				status = "okay";
				clock-frequency = < 0x8000 >;
				prescaler = < 0x1 >;
				label = "RTC_1";
			};
			clock: clock@5000 {
				compatible = "nordic,nrf-clock";
				reg = < 0x5000 0x1000 >;
				interrupts = < 0x5 0x1 >;
				status = "okay";
				label = "CLOCK";
			};
			power: power@5000 {
				compatible = "nordic,nrf-power";
				reg = < 0x5000 0x1000 >;
				interrupts = < 0x5 0x1 >;
				status = "okay";
			};
			wdt: wdt0: watchdog@18000 {
				compatible = "nordic,nrf-watchdog";
				reg = < 0x18000 0x1000 >;
				interrupts = < 0x18 0x1 >;
				status = "okay";
				label = "WDT";
			};
			timer0: timer@f000 {
				compatible = "nordic,nrf-timer";
				status = "okay";
				reg = < 0xf000 0x1000 >;
				cc-num = < 0x6 >;
				interrupts = < 0xf 0x1 >;
				prescaler = < 0x0 >;
				label = "TIMER_0";
			};
			timer1: timer@10000 {
				compatible = "nordic,nrf-timer";
				status = "okay";
				reg = < 0x10000 0x1000 >;
				cc-num = < 0x6 >;
				interrupts = < 0x10 0x1 >;
				prescaler = < 0x0 >;
				label = "TIMER_1";
			};
			timer2: timer@11000 {
				compatible = "nordic,nrf-timer";
				status = "okay";
				reg = < 0x11000 0x1000 >;
				cc-num = < 0x6 >;
				interrupts = < 0x11 0x1 >;
				prescaler = < 0x0 >;
				label = "TIMER_2";
			};
		};
		gpiote: gpiote@40031000 {
			compatible = "nordic,nrf-gpiote";
			reg = < 0x40031000 0x1000 >;
			interrupts = < 0x31 0x5 >;
			status = "okay";
			label = "GPIOTE_1";
		};
		cryptocell_sw: cryptocell-sw {
			compatible = "nordic,nrf-cc310-sw";
			#address-cells = < 0x0 >;
			label = "CRYPTOCELL_SW";
		};
	};
	cpus {
		#address-cells = < 0x1 >;
		#size-cells = < 0x0 >;
		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m33f";
			reg = < 0x0 >;
			#address-cells = < 0x1 >;
			#size-cells = < 0x1 >;
			mpu: mpu@e000ed90 {
				compatible = "arm,armv8m-mpu";
				reg = < 0xe000ed90 0x40 >;
				arm,num-mpu-regions = < 0x10 >;
			};
		};
	};
	leds {
		compatible = "gpio-leds";
		led0: led_0 {
			gpios = < &gpio0 0x2 0x0 >;
			label = "Green LED 1";
		};
		led1: led_1 {
			gpios = < &gpio0 0x3 0x0 >;
			label = "Green LED 2";
		};
		led2: led_2 {
			gpios = < &gpio0 0x4 0x0 >;
			label = "Green LED 3";
		};
		led3: led_3 {
			gpios = < &gpio0 0x5 0x0 >;
			label = "Green LED 4";
		};
	};
	pwmleds {
		compatible = "pwm-leds";
		pwm_led0: pwm_led_0 {
			pwms = < &pwm0 0x2 >;
		};
	};
	buttons {
		compatible = "gpio-keys";
		button0: button_0 {
			gpios = < &gpio0 0x8 0x11 >;
			label = "Switch 1";
		};
		button1: button_1 {
			gpios = < &gpio0 0x9 0x11 >;
			label = "Switch 2";
		};
		button2: button_2 {
			gpios = < &gpio0 0x6 0x11 >;
			label = "Push button 1";
		};
		button3: button_3 {
			gpios = < &gpio0 0x7 0x11 >;
			label = "Push button 2";
		};
	};
	interface_to_nrf52840: gpio-interface {
		compatible = "nordic,nrf9160dk-nrf52840-interface";
		#gpio-cells = < 0x2 >;
		gpio-map-mask = < 0xf 0x0 >;
		gpio-map-pass-thru = < 0x0 0xffffffff >;
		gpio-map = < 0x0 0x0 &gpio0 0x11 0x0 >, < 0x1 0x0 &gpio0 0x12 0x0 >, < 0x2 0x0 &gpio0 0x13 0x0 >, < 0x3 0x0 &gpio0 0x15 0x0 >, < 0x4 0x0 &gpio0 0x16 0x0 >, < 0x5 0x0 &gpio0 0x17 0x0 >;
		phandle = < 0x4 >;
	};
	nrf52840_reset: gpio-reset {
		compatible = "nordic,nrf9160dk-nrf52840-reset";
		status = "disabled";
		gpios = < &interface_to_nrf52840 0x5 0x0 >;
	};
	reserved-memory {
		#address-cells = < 0x1 >;
		#size-cells = < 0x1 >;
		ranges;
		sram0_s: image_s@20000000 {
			reg = < 0x20000000 0x10000 >;
		};
		sram0_bsd: image_bsd@20010000 {
			reg = < 0x20010000 0x10000 >;
		};
		sram0_ns: image_ns@20020000 {
			reg = < 0x20020000 0x20000 >;
		};
	};
};

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

Simon — Tue, 06 Apr 2021 12:36:32 GMT

I have not done too much investigation, and why it works/doesn't work in the different circumstances.

However, my suspicion is that it has something to do with this: https://devzone.nordicsemi.com/f/nordic-q-a/62899/nrf9160---only-one-of-the-following-peripherals-can-be-enabled-spi1-uarte1-why/256549#256549

Does it work if you set the following in the overlay file:

&uart2 {
    status="disabled";
} 
&i2c2 {
    status="disabled";
}

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

plotkin1996 — Tue, 06 Apr 2021 06:27:07 GMT

It's alright, I was gone myself. But I fiddled a bit more now noticed a remarkable pattern: a build without SPM (as is default on last SDK) works, but the consumption is high as power mode services are unavailable. If SPM is included, I again get weird behavior that SPIS doesn't receive any data until I connect the debugger. Is it possible that there is interaction between non-secure SPIS and a secure device on the same peripheral slot?

Edit: also it seems that SPIS works if I set CONFIG_SERIAL=y. How is that possible?

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

Simon — Mon, 05 Apr 2021 10:01:27 GMT

Sorry for the delay on this, I've been gone due to easter vacation. I'll look into this the upcoming week.

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

plotkin1996 — Tue, 30 Mar 2021 09:33:16 GMT

Thank you. It worked, but only if csn pin is used. Is it possible to disable CNS sense altogether?

Also: the SPIS seems to use about 40µA while idle. Is this expected, or is there some way to reduce consumption without taking SPIS down completely?

RE: nrf9160 SPI slave issues (SDK version 1.4.0)

Simon — Mon, 29 Mar 2021 17:26:06 GMT

Could you check out this reply: https://devzone.nordicsemi.com/f/nordic-q-a/70104/spi-master-is-broken-in-sdk-v1-4-x/288816#288816

Where two samples are attached, one SPI master and one SPI slave. I think they're made for NCS v1.4.0, but I think they should work with NCS v1.5.0 as well.

Best regards,

Simon