STALLSTAT on SPIM3 writes to flash IC

RE: STALLSTAT on SPIM3 writes to flash IC

hmolesworth — Fri, 23 Apr 2021 18:21:47 GMT

Try moving the buffer to a reserved SRAM area which no other code accesses, rather than just stuffing it on the stack which is the most memory-intensive SRAM area:

    uint8_t buff[0x0880];

That way the buffer gets its own DMA AHB slave bus and doesn't have to share. Something like this, there are examples in the devzone:

// Place following data in section .spim3 so it has private SRAM segment
#pragma default_variable_attributes = @ ".spim3" // if using IAR
// Reserved spim3 buffer
volatile uint8_t buff[0x0880] __attribute__((section(".sect_spim3")));
#pragma default_variable_attributes =            // if using IAR
// End - Place following data in section .spim3

// These are the SRAM areas:
//
//  RAM0 Section 0 0x2000 0000 - 0x2000 0FFF
//       Section 1 0x2000 1000 - 0x2000 1FFF
//  RAM1 Section 0 0x2000 2000 - 0x2000 2FFF
//       Section 1 0x2000 3000 - 0x2000 3FFF
//  RAM2 Section 0 0x2000 4000 - 0x2000 4FFF
//       Section 1 0x2000 5000 - 0x2000 5FFF
//  RAM3 Section 0 0x2000 6000 - 0x2000 6FFF
//       Section 1 0x2000 7000 - 0x2000 7FFF
//  RAM4 Section 0 0x2000 8000 - 0x2000 8FFF
//       Section 1 0x2000 9000 - 0x2000 9FFF
//  RAM5 Section 0 0x2000 A000 - 0x2000 AFFF
//       Section 1 0x2000 B000 - 0x2000 BFFF
//  RAM6 Section 0 0x2000 C000 - 0x2000 CFFF
//       Section 1 0x2000 D000 - 0x2000 DFFF
//  RAM7 Section 0 0x2000 E000 - 0x2000 EFFF
//       Section 1 0x2000 F000 - 0x2000 FFFF

Ensure the section .sect_spim3 is defined in the linker area as a separate SRAM area in SEGGER_Flash.icf file. Here is an example from Torbjorn: designate-one-ram-block-exclusively

Note also using P1.nn pins is dodgy if you wish to boost to a much higher serial SPI clock, since those pins do not allow H0H1 drive settings, which you will need. Port P0.nn is preferred.

RE: STALLSTAT on SPIM3 writes to flash IC

SmallerPond — Fri, 23 Apr 2021 17:52:26 GMT

And actually, if you'll check the question, I've posted a minimal example that reproduces the behavior, as well as my compiler settings and sdk_config.

RE: STALLSTAT on SPIM3 writes to flash IC

SmallerPond — Fri, 23 Apr 2021 12:44:03 GMT

Hey Simonr, thanks! In this application there is no logging and it has all been disabled, which was part of my confusion. Is it possible that performing a SPIM txrx transaction while another is still in process not only returns a busy error but also causes a stall?

RE: STALLSTAT on SPIM3 writes to flash IC

Simonr — Fri, 23 Apr 2021 12:02:27 GMT

The STALLSTAT should only occur due to ASHB bus congestions (AHB bus masters trying to access the same AHB slave at the same time). An EasyDMA channel is an AHB master, so apparently it tries to use an already busy peripheral in this case.

It could be that the UARTE tries using the same bus for logging for example, or that you have another peripheral using it for some reason. So yes, if you use the UART backend for logging, I guess the debugger could be the peripheral conflicting with SPIM. You can try disabling logging altogether to see whether there are more successful writes on your flash.

Best regards,

Simon