About the Pin sensing mechanism

RE: About the Pin sensing mechanism

Amberliu — Sun, 25 Apr 2021 01:22:00 GMT

Hi，

Thank you very much, I got it.

RE: About the Pin sensing mechanism

hmolesworth — Fri, 23 Apr 2021 17:52:17 GMT

Each port pin has dual internal schottky diode protection, which is a normally reversed-biased schottky clamp diode from each port pin to both GND and VDD, which stops the voltage on the pin rising significantly above VDD or below GND.

Because of these clamp diodes, port pins will try to "phantom power" the entire nRF52832 SoC and anything connected to the SoC if they are driven high while nRF52832 SoC power (VDD33) is removed.

With a voltage on VBUS but no voltage on VDD33, pressing SW1 causes the VDD33 to be back-driven through the port pins Button_Detect or PWR_CTL via the internal schottky clamp diode to VDD on the port pin via the 10K resistor R8. Thus the voltage measured is as you observe.

RE: About the Pin sensing mechanism

JONATHAN LL — Fri, 23 Apr 2021 10:57:29 GMT

Hi,

Is the nrf52832 in system of mode or is there no power to the SoC?

[quote user=""]voltage of GPIO is wrong[/quote]

What did you measure?

[quote user=""]what is function the Pin sensing mechanism?[/quote]

Pleas see this comment on Devzone: https://devzone.nordicsemi.com/f/nordic-q-a/21581/what-is-usage-of-sensing-a-gpio-pin

Regards,
Jonathan