RE: Attempting SPIM3 reads with MOSI and MISO Tied Together

Kenneth — Mon, 03 May 2021 11:58:50 GMT

Typically you can solve this by adding a 1kohm resistor on MOSI as shown in the figure here:
https://os.mbed.com/questions/69051/SPI-Halfduplex-MOSI-3-wire-read-support-/

Typically the input buffer on MISO then will reflect data on MOSI, unless DOUT drives the line.

RE: Attempting SPIM3 reads with MOSI and MISO Tied Together

hmolesworth — Sat, 01 May 2021 20:18:59 GMT

3-wire SPI doesn't have a MISO line but instead a bi-directional data line - effectively a MOSI and MISO combo. Usually used when pin count is at a premium; often 4-wire SPI devices have a command setting that allows changing to 3-wire SPI mode.

I agree it would be helpful to know which E-ink display is being used, and a schematic would be useful. I use E-ink displays but I don't recall using one with a readable temperature sensor.

RE: Attempting SPIM3 reads with MOSI and MISO Tied Together

awneil — Sat, 01 May 2021 08:53:10 GMT

[quote userid="24036" url="~/f/nordic-q-a/74654/attempting-spim3-reads-with-mosi-and-miso-tied-together"]

(the display does not utilize a MISO line).

I am currently attempting to read back the temperature from the display

[/quote]

If the display doesn't use MISO, how can you possibly read anything from it?

I think you need to give more details of how you expect this to work.

Including a schematic, and links to the display in question would also help.

RE: Attempting SPIM3 reads with MOSI and MISO Tied Together

hmolesworth — Fri, 30 Apr 2021 22:52:47 GMT

The SPI code you are using assumes 4-wire SPI, but to connect MOSI to MISO 3-wire SPI mode is required, which I don't think the driver you are using supports. Here is low-level code showing how it's done:

static void Test3WireSPI(void)
{
  NRF_GPIO->PIN_CNF[CSPIN]   = 0x301;  // output, high drive high and low H0H1
  NRF_GPIO->PIN_CNF[SCKPIN]  = 0x301;  // output, high drive high and low H0H1
  NRF_GPIO->PIN_CNF[MOSIPIN] = 1;      // output, standard drive S0S1
  NRF_GPIO->PIN_CNF[MISOPIN] = 0;      // input pin, input buffer connected, no pull, S0S1, sense disabled
  NRF_GPIO->OUTSET = 1 << CSPIN;       // deactivate by setting chip select high
  NRF_SPIM3->PSEL.SCK = SCKPIN;
  NRF_SPIM3->PSEL.MOSI = MOSIPIN;
  NRF_SPIM3->PSEL.MISO = 0xFFFFFFFFUL; // MISOPIN;
  NRF_SPIM3->CONFIG = 0;               // CPOL 0 -- clock polarity active high, CPHA 1 -- sample on trailing clock edge, send Msb first
  NRF_SPIM3->FREQUENCY = 0x80000000UL; // 8 Mbps
  NRF_SPIM3->ORC =0;                   // Unused Tx bytes, set all low

  // Configure registers for 3-wire mode
  NRF_SPIM3->PSEL.MOSI = MOSIPIN;
  NRF_SPIM3->PSEL.MISO = 0xFFFFFFFFUL; // MISOPIN;
  NRF_GPIO->PIN_CNF[MOSIPIN] = 1;      // output

  NRF_SPIM3->EVENTS_ENDTX = 0;
  //NRF_SPIM3->EVENTS_ENDRX = 0;

  // Disable all interrupts
  NRF_SPIM3->INTENCLR = 0xFFFFFFFFUL;
  // Enable selected interrupts
  NRF_SPIM3->INTENSET = 0x40;   // END

  // Set interrupt priority and enable interrupt
  NVIC_SetPriority(SPIM3_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 6);
  NVIC_ClearPendingIRQ(SPIM3_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn);
  NVIC_EnableIRQ(SPIM3_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn);

  NRF_SPIM3->ENABLE = 7;               // enable SPI
  // Transfer registers to set 3-wire SPI mode on target
  NRF_SPIM3->TXD.PTR = (uint32_t)mACC_ControlRegisterRequiredSettings;
  NRF_SPIM3->TXD.MAXCNT = sizeof(mACC_ControlRegisterRequiredSettings);
  NRF_SPIM3->RXD.PTR = NULL;
  NRF_SPIM3->RXD.MAXCNT = 0;

  NRF_GPIO->OUTCLR = 1 << CSPIN;    // drive cs low to initiate spi comm
  NRF_SPIM3->TASKS_START = 1;
  while(!NRF_SPIM3->EVENTS_ENDTX);  // last byte transmitted
  NRF_SPIM3->TASKS_STOP = 1;
  NRF_GPIO->OUTSET = 1 << CSPIN;

  // Send 3-wire whoami command byte (1 byte only)
  // Connect output drive, connect 1-wire rx/tx output to MOSI
  NRF_SPIM3->PSEL.MISO = 0xFFFFFFFF; // MISOPIN;
  NRF_SPIM3->PSEL.MOSI = MOSIPIN;
  NRF_GPIO->PIN_CNF[MOSIPIN] = 1;    // output
  NRF_SPIM3->TXD.PTR = (uint32_t)spi3wTXBuf;
  NRF_SPIM3->TXD.MAXCNT = 1;
  NRF_SPIM3->RXD.PTR = NULL;
  NRF_SPIM3->RXD.MAXCNT = 0;
  NRF_SPIM3->EVENTS_ENDTX = 0;
  NRF_GPIO->OUTCLR = 1 << CSPIN;       // drive cs low to initiate spi comm
  NRF_SPIM3->TASKS_START = 1;
  while(!NRF_SPIM3->EVENTS_ENDTX);     // last byte transmitted

  // Manual says disable SPI before changing pins, but actually doesn't matter
  NRF_SPIM3->ENABLE = 0;               // disable SPI
  // Disconnect output drive, connect 1-wire rx/tx input to MISO
  NRF_SPIM3->PSEL.MOSI = 0xFFFFFFFFUL; // MOSIPIN;
  NRF_GPIO->PIN_CNF[MOSIPIN] = 0;      // input pin, input buffer connected, no pull, S0S1, sense disabled
  NRF_SPIM3->PSEL.MISO = MOSIPIN;      // MISOPIN;
  NRF_SPIM3->ENABLE = 7;               // enable SPI
  spi3wRXBuf[0] = 99; spi3wRXBuf[1] = 98;
  NRF_SPIM3->TXD.PTR = NULL;
  NRF_SPIM3->TXD.MAXCNT = 0;
  NRF_SPIM3->RXD.PTR = (uint32_t)spi3wRXBuf;
  NRF_SPIM3->RXD.MAXCNT = 1;
  NRF_SPIM3->EVENTS_ENDRX = 0;
  NRF_SPIM3->TASKS_START = 1;
  while(!NRF_SPIM3->EVENTS_ENDRX);    // last byte received

  NRF_SPIM3->TASKS_STOP = 1;
  while(!NRF_SPIM3->EVENTS_STOPPED);
  NRF_GPIO->OUTSET = 1 << CSPIN;
}

This link give more details 3-wire-spi-bi-directional-communication