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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI asynchronoues usage</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/74738/spi-asynchronoues-usage</link><description>I am currently working on nRF52DK and TCAN4550 using SPI communication. Regardless the SPI slave which I am using, I have some doubts with SPI Nordic library (I am using 17.0.2 SDK). 
 It I provided three ways to implement SPI communications: 
 
 SPI</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 07 May 2021 08:10:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/74738/spi-asynchronoues-usage" /><item><title>RE: SPI asynchronoues usage</title><link>https://devzone.nordicsemi.com/thread/308664?ContentTypeID=1</link><pubDate>Fri, 07 May 2021 08:10:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:df40e0c2-6d82-489c-a7f2-6cf27f40b153</guid><dc:creator>jfpastrana</dc:creator><description>&lt;p&gt;Hello Amanda,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Many thanks for your explanation, now I understand better how to manage the interrupts. Moreover, I did not know this:&lt;/p&gt;
&lt;p style="padding-left:30px;"&gt;&lt;em&gt;The GPIOTE handler will still run in interrupt context and will wake the chip from sleep and jump to the handler before executing the rest of the code in the main-loop. The rest of the code in main-loop will be executed before going back to sleep (unless they have multiple sleep statements in the loop.&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;Also, I think that I have to implement some scheduling mechanism as you said, in order to be sure that I am not missing CAN frames.&lt;/p&gt;
&lt;p&gt;Thanks again for the support, I think that we can tick as close this topic.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Javier&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI asynchronoues usage</title><link>https://devzone.nordicsemi.com/thread/308468?ContentTypeID=1</link><pubDate>Thu, 06 May 2021 08:27:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c8d285d6-5f36-43e4-9721-d485687a88cc</guid><dc:creator>Amanda Hsieh</dc:creator><description>&lt;p&gt;Hi Javier,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;In general, it is best to not spend long periods of time inside the interrupt handler, as you will be blocking other events with same or lower priority from being handled. Blocking transfer will most likely take the same time or longer than non-blocking, so no difference there. If they should do it inside the handler or outside depends on what else is running in their application, and how long time the transfer will take.&lt;/p&gt;
&lt;p&gt;Not sure I understand the concern about missing CAN frames due to sleep in the loop. The GPIOTE handler will still run in interrupt context and will wake the chip from sleep and jump to the handler before executing the rest of the code in the main-loop. The rest of the code in main-loop will be executed before going back to sleep (unless they have multiple sleep statements in the loop.&lt;/p&gt;
&lt;p&gt;If they expect more than one CAN frame to arrive before they are able to read out the frames over SPI, they may need some scheduling mechanism that indicate how many frames should be read.&lt;/p&gt;
&lt;p&gt;Another option is to use the &lt;u&gt;&lt;a title="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.0.2/hardware_driver_spi_master.html?cp=7_1_2_0_13_2#hardware_driver_spi_advanced" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.0.2/hardware_driver_spi_master.html?cp=7_1_2_0_13_2#hardware_driver_spi_advanced"&gt;Advanced usage&lt;/a&gt;&lt;/u&gt; features in the SPI driver to trigger the SPI transfer directly over PPI from the GPIOTE event. This only works if the transfer can be completed and processed before the next CAN frame arrives, as PPI does not have any ways to check if a transfer is already ongoing.&lt;/p&gt;
&lt;p&gt;-Amanda H.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI asynchronoues usage</title><link>https://devzone.nordicsemi.com/thread/308368?ContentTypeID=1</link><pubDate>Wed, 05 May 2021 13:28:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ba5f301e-751f-482a-bb3d-e862e1018e42</guid><dc:creator>jfpastrana</dc:creator><description>&lt;p&gt;Hello Amanda,&lt;/p&gt;
&lt;p&gt;First, thanks for your support. Regarding the first question, now it is clearer.&lt;/p&gt;
&lt;p&gt;Considering the second question, I have just changed the priorities, giving to SPI priority 3 and GPIOTE keep in 6. If I keep the SPI transfer function inside of GPIO handler it now works, but I am not sure if I am missing received CAN frames.&lt;/p&gt;
&lt;p&gt;Now I want to ask you for your opinion /recommendation for one of the following solutions:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Blocking SPI transfer function inside of GPIO handler.&lt;/li&gt;
&lt;li&gt;Non-blocking SPI transfer function inside of GPIO handler.&lt;/li&gt;
&lt;li&gt;Non-blocking SPI transfer outside GPIO handler, using a flag in main-loop.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Which one is better in terms of robustness??&lt;/p&gt;
&lt;p&gt;I have also performed a test using a flag and checking it inside main-loop, but it exits also the possibility to lose some CAN frame due to I have a sleep inside the loop. Any ideas to solve this?&lt;/p&gt;
&lt;p&gt;Many thanks and best regards,&lt;/p&gt;
&lt;p&gt;Javier&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI asynchronoues usage</title><link>https://devzone.nordicsemi.com/thread/308352?ContentTypeID=1</link><pubDate>Wed, 05 May 2021 12:38:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fcbc61aa-04d3-441a-a3a8-49d47ab415da</guid><dc:creator>Amanda Hsieh</dc:creator><description>&lt;p&gt;Hi Javier,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote user=""]I am using SPI Master Driver, even if it is based on legacy driver “SPI/SPIM peripheral driver”. Therefore, is it better to use SPI HAL?? [/quote]
&lt;p&gt;&lt;span&gt;The Hardware Abstraction Layer (HAL) ensures safe register access to a peripheral but is often limited in features. A driver sits atop the HAL and expands on its feature set.&amp;nbsp;&lt;/span&gt;&lt;span&gt;Whether you want to use the HAL or driver depends on your specific use-case, many drivers ensure reliable operation of the peripherals that might otherwise be tricky to do by writing a driver from scratch.&amp;nbsp;&lt;/span&gt;&amp;nbsp;&lt;/p&gt;
[quote user=""]My other doubt begin now, I have configured a GPIO HW interrupt in order to know when I receive a new CAN frame, and afterwards read using SPI library to get that frame. If I use a non-blocking transfer inside of a GPIO handler, my program breaks due to a handler inside of another handler… It is normal. [/quote]
&lt;p&gt;You can do the transfers outside of the GPIOTE handler, by setting a flag and start the transfer in main-loop if the flag is set. Alternatively, you can run SPI at a higher priority than the GPIOTE, to allow the SPI handler to preempt the current interrupt context, to handle the events and set the trasnfer-done flag.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;-Amanda H.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>