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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/75541/nrf5340-lfxo-internal-load-cap-setting</link><description>Hello, 
 I am looking at the schematic for the nRF5340 DK and see that there are no external load capacitors for the 32 kHz crystal which has C_L = 9 pF. Therefore, we are relying on the nRF5340 internal load capacitor feature through firmware. Looking</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 28 May 2021 06:06:29 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/75541/nrf5340-lfxo-internal-load-cap-setting" /><item><title>RE: nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/thread/312259?ContentTypeID=1</link><pubDate>Fri, 28 May 2021 06:06:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ab7c50da-dafe-485d-87fd-61a2081bc079</guid><dc:creator>JONATHAN LL</dc:creator><description>&lt;p&gt;The figure and formula is not correct if you use the internal capacitors. So the math wont add up, i belive this will be addressed in the next update of the product specification.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;Regards,&lt;br /&gt;Jonathan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/thread/312229?ContentTypeID=1</link><pubDate>Thu, 27 May 2021 21:55:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cbf69eeb-5730-41c9-a853-63d2e44425d2</guid><dc:creator>Akash Patel</dc:creator><description>&lt;p&gt;&lt;span&gt;Hi Jonathan,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I marked the answer as verified but then later came back to this and realized&amp;nbsp;&lt;/span&gt;&lt;span&gt;the math still isn&amp;#39;t working out for me. So if we set I_CL = 6pF (through the register) and there is 3pF capacitance from the pad, we get a total of 9pF for both C1&amp;#39; and C2&amp;#39;. But then using the formula for C_L (figure 24 in the PS), we only get 4.5 pF. I think there is still something wrong.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Akash&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/thread/312101?ContentTypeID=1</link><pubDate>Thu, 27 May 2021 12:55:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:647d4ec9-353c-420a-b0a2-c609f9b35c12</guid><dc:creator>JONATHAN LL</dc:creator><description>&lt;p&gt;New update with some corrections here.&lt;br /&gt;&lt;br /&gt;There will be a update in the PS&amp;nbsp;that hopefully addresses this issue in a proper way as it is inconsistent at best right now.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;The 6pF is correct, but a bitt difficult to understand from the docs. The real value is&amp;nbsp;closer to 9pF due to stray capacitance in the XL1 and XL2 pins.&lt;br /&gt;&lt;br /&gt;So the the &lt;em&gt;internal load&amp;nbsp;capacitance&lt;/em&gt;&amp;nbsp;(I&lt;sub&gt;CL&lt;/sub&gt;) for the LF on the nrf53 has the options 6pF, 7pF and 9pF, these values will result in a &lt;em&gt;load capacitances&lt;/em&gt; (&lt;em&gt;C&lt;sub&gt;L&lt;/sub&gt;&lt;/em&gt;) equal to the&amp;nbsp;&lt;span&gt;I&lt;/span&gt;&lt;sub&gt;CL&amp;nbsp;&lt;/sub&gt;plus the&amp;nbsp;stray capacitance&amp;nbsp;&lt;span&gt;from the PCB (&lt;/span&gt;pad and routing capacitance), it is approximately 3pF.&lt;br /&gt;&lt;br /&gt;So that gives us&amp;nbsp;&amp;nbsp;&lt;em&gt;C&lt;sub&gt;L&lt;/sub&gt;&lt;/em&gt;&amp;nbsp;=&amp;nbsp; &amp;nbsp;&lt;span&gt;I&lt;/span&gt;&lt;sub&gt;CL&lt;/sub&gt;&amp;nbsp;+ 3pF,&amp;nbsp; and in the case of the nrf53 DK that has a crystal that wants a max&amp;nbsp;&lt;em&gt;C&lt;sub&gt;L&lt;/sub&gt;&lt;/em&gt; of 9pF we sett the&amp;nbsp;&lt;span&gt;I&lt;/span&gt;&lt;sub&gt;CL&lt;/sub&gt;&amp;nbsp;to 6pF and add the 3pF form stray PCB capacitance and we get the 9pF we want.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;So the previous&amp;nbsp;answer&amp;nbsp;was not that great.&lt;br /&gt;&lt;br /&gt;Regards,&lt;br /&gt;Jonathan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/thread/311588?ContentTypeID=1</link><pubDate>Tue, 25 May 2021 17:35:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:87bb30d1-e6ac-4c8b-93df-94d0d56bd5de</guid><dc:creator>Akash Patel</dc:creator><description>&lt;p&gt;Hi Jonathan,&lt;/p&gt;
&lt;p&gt;If that is indeed the case, the firmware by default is selecting 6pF &lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/master/soc/arm/nordic_nrf/nrf53/soc.c#L70"&gt;here&lt;/a&gt; and I don&amp;#39;t think that is being changed with any of the overlays or files while the crystal is specifying a C_L of 9pF causing a discrepancy. Can you look into this?&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Akash&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/thread/311369?ContentTypeID=1</link><pubDate>Tue, 25 May 2021 09:04:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7cea426b-97f1-4dcb-80a9-15eac5e34d89</guid><dc:creator>JONATHAN LL</dc:creator><description>&lt;p&gt;&lt;span style="text-decoration:line-through;"&gt;When the 9pF is selected internally then that is actually a 18pF capacitors for each pin, so C1 = 18pF and C2 = 18pF, that makes the value of CL = 9pF. So if the device spec says crystal needs CL to be 9pF then you can select internal 9pF.&amp;nbsp;&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;There will be some updates to the docs to help clarify.&amp;nbsp;&lt;br /&gt;Regards,&lt;br /&gt;Jonathan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 LFXO Internal Load Cap Setting</title><link>https://devzone.nordicsemi.com/thread/311281?ContentTypeID=1</link><pubDate>Fri, 21 May 2021 13:55:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e00d47aa-f4ed-44e8-b945-69e364c7528b</guid><dc:creator>JONATHAN LL</dc:creator><description>&lt;p&gt;Hi Akash,&lt;br /&gt;&lt;br /&gt;I believe you are correct but have forwarded the question to the designer so will update you when we have a proper answer.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;Regards,&lt;br /&gt;Jonathan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>