I2C logic low level did not to 0.https://devzone.nordicsemi.com/f/nordic-q-a/75546/i2c-logic-low-level-did-not-to-0The test of I2C signal found that the logic low level could not be lowered. It was pulled up to 3.3V through the external 1K resistor, and the logic low level of I2C was about 0.7V. In addition, there was a step of DAT signal, please help to check whaten-USTelligent Community 13Tue, 25 May 2021 07:55:16 GMTRE: I2C logic low level did not to 0.https://devzone.nordicsemi.com/thread/311336?ContentTypeID=1Tue, 25 May 2021 07:55:16 GMT137ad170-7792-4731-bb38-c0d22fbe4515:ae0c0210-58de-4cf3-ad0e-9795f3dd5043Dmitry<p>Hi,</p> <p>with 1K<span>&nbsp;</span>pull-up, you have 3.3mA current over I2C pin. If the pin is configured in standard drive mode, output voltage will be about 0.6V (see<span>&nbsp;</span><a href="https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/gpio.html?cp=4_2_0_19_3_0#unique_1511470077">figure 3</a>). You can either configure SCL and SDA in high-drive mode (NRF_GPIO_PIN_H0D1), or use less strong pull-ups (in most cases 2k2 is enough for 400kHz).</p> <p>The step on SDA is caused by ACK pulse from replying device with higer drive stength.</p><div style="clear:both;"></div>