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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340 Eval board layout</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/75727/nrf5340-eval-board-layout</link><description>On the Eval board layout, the 2 nd and 3 rd layer cut away under the RF trace. That make the substract height equal to 57.87 mil. 
 For 30 mil width trace, the impedance will be 99.1 ohm. 
 Is the chip’s RF port designed for 100ohm match, not 50 ohm?</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 28 May 2021 12:21:51 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/75727/nrf5340-eval-board-layout" /><item><title>RE: nRF5340 Eval board layout</title><link>https://devzone.nordicsemi.com/thread/312365?ContentTypeID=1</link><pubDate>Fri, 28 May 2021 12:21:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1707e4c9-cb43-4bec-8408-638f6ac933f2</guid><dc:creator>ArthurLai</dc:creator><description>&lt;p&gt;Never mind, I used the wrong model.&amp;nbsp; Should use the CPW model instead, I got closer to 50 ohm with CPW calculation.&lt;/p&gt;
&lt;p&gt;Thanks all.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>