https://devzone.nordicsemi.com/f/nordic-q-a/76102/silicon-revision-register-documentationIs there documentation on the silicon revision registers/memory locations? Different versions of the SDK seem to look at different memory locations for revision information when determining which errata to apply. For example, in the SDK we are usingen-USTelligent Community 13Tue, 08 Jun 2021 12:02:49 GMThttps://devzone.nordicsemi.com/thread/314196?ContentTypeID=1Tue, 08 Jun 2021 12:02:49 GMT137ad170-7792-4731-bb38-c0d22fbe4515:4f8cc459-3b01-4d72-aee1-c74b28c9f8f0Einar Thorsrud<p>Hi,</p> <p>These registers are not documented publicly, but&nbsp;0x10000134 essentially contains information about the HW revision, so the handling of this in MDK 8.35.0 which is part of SDK 17.0.2 is correct. Here you also see that the default behavior is to return true, so the errata workaround will be applied in case of a newer IC revision than what the MDK was built for. That was not the case before, which is what you are seeing.</p> <p>You can migrate to a newer MDK version without updating the SDK, but that will require some porting on your side (not too much). Alternatively if you want to avoid any potential side effects of work, you can go through the MDK you have and modify the relevant functions to always enable the errata workaround (so for instance ensure&nbsp;nrf52_errata_187() always returns true.).</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/313993?ContentTypeID=1Mon, 07 Jun 2021 15:19:40 GMT137ad170-7792-4731-bb38-c0d22fbe4515:79a65ca6-5d99-4aef-be87-304f73da8ccbmark.blackburn.orpyx<p>We are using SDK version&nbsp;15.0.0</p><div style="clear:both;"></div>