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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI Slave Example Data transfer issue</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/76187/spi-slave-example-data-transfer-issue</link><description>Hi, 
 I am using spis example from &amp;quot;SDK v17.0.2&amp;quot; with slight modification in the code as given below 
 
 
 On the Master end CS pin is pulled low and send 1 byte(0x45) only at a time. On the BLE I defined &amp;quot;nrf_drv_spis_buffers_set&amp;quot; inside &amp;quot;spis_event_handler</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 11 Jun 2021 07:49:20 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/76187/spi-slave-example-data-transfer-issue" /><item><title>RE: SPI Slave Example Data transfer issue</title><link>https://devzone.nordicsemi.com/thread/314838?ContentTypeID=1</link><pubDate>Fri, 11 Jun 2021 07:49:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e5ecfcd7-c065-463d-8f7c-bccd0bd09e4f</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi Siva,&lt;/p&gt;
[quote user="Siva@Tsien"]Is there an spis event that can trigger after every byte of transaction completed?[/quote]
&lt;p&gt;No, the SPIS peripheral doe snot have any possibility to generate that. And the transaction is only considered completed when CNS goes high (see &lt;a href="https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/spis.html?cp=4_2_0_31_2#concept_abk_lbf_wr"&gt;SPI slave operation&lt;/a&gt;).&lt;/p&gt;
[quote user="Siva@Tsien"]Do you have an SPIS&amp;nbsp; example with interrupt driven?[/quote]
&lt;p&gt;No. The SPIS peripheral only operates on DMA. (For SPI master there is the SPI peripheral which does not rely on DMA, but there is no corresponding SPI slave peripheral in the nRF52832).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Slave Example Data transfer issue</title><link>https://devzone.nordicsemi.com/thread/314694?ContentTypeID=1</link><pubDate>Thu, 10 Jun 2021 12:17:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:04f70624-cca8-426d-a5d2-fc501fb9c43e</guid><dc:creator>Siva@Tsien</dc:creator><description>&lt;p&gt;Hi Einar,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;It&amp;#39;s the &amp;quot;Chip Select&amp;quot; and &amp;quot;nrf_drv_buffers_set&amp;quot; events that actually triggering &amp;quot;spis_event_handler&amp;quot; condition.&lt;/p&gt;
&lt;p&gt;Is there an spis event that can trigger after every byte of transaction completed?&lt;/p&gt;
&lt;p&gt;I guess SPIS uses Easy-DMA which is why I won&amp;#39;t be able to read an interrupt between transactions. I guess I need to implement without using DMA but with interrupt driven correct me if I am wrong.&lt;/p&gt;
&lt;p&gt;Do you have an SPIS&amp;nbsp; example with interrupt driven?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Regards&lt;/p&gt;
&lt;p&gt;Siva&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Slave Example Data transfer issue</title><link>https://devzone.nordicsemi.com/thread/314682?ContentTypeID=1</link><pubDate>Thu, 10 Jun 2021 11:48:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cd81af36-d44e-4fb4-8f97-150abc34e1da</guid><dc:creator>Siva@Tsien</dc:creator><description>&lt;p&gt;Hi Einar,&lt;/p&gt;
&lt;p&gt;In our application we are reading only 1-Byte at a time from the master side. Once the transaction is complete, &amp;quot;spis_event_handler&amp;quot; will gets called and adds the second byte into first byte of the buffer register which I defined nrf_drv_buffers_set inside spis_event_handler to do this.&lt;/p&gt;
&lt;p&gt;Now the master will send another byte to read the second byte stored in the buffer registers first byte.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t know if I can do something like this? The above method working if I toggle the chip selection pin.&lt;/p&gt;
&lt;p&gt;Regards&lt;/p&gt;
&lt;p&gt;Siva&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Slave Example Data transfer issue</title><link>https://devzone.nordicsemi.com/thread/314674?ContentTypeID=1</link><pubDate>Thu, 10 Jun 2021 11:25:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8b117920-942e-4405-91c0-f56fc5e7a6e6</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi Siva,&lt;/p&gt;
&lt;p&gt;In your call to&amp;nbsp;nrf_drv_spis_buffers_set() you specify that the buffer lengths are 1 byte (even though they are actually larger), and so you cannot transfer more than one byte. You need to increase that (though not more than the actual buffer length or you will get an overflow).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>