SPI clock pin configuration for nRF52840.

RE: SPI clock pin configuration for nRF52840.

Shivek — Thu, 22 Jul 2021 16:56:03 GMT

So, finally I was able to see the clock and signal. The Problem was disabling the interrupts before calling the transfer function and this discussion helped me to configure SPI driver properly. Thanks to Hmolesworth and Einar.

RE: SPI clock pin configuration for nRF52840.

Einar Thorsrud — Mon, 28 Jun 2021 10:57:55 GMT

Hi Shivek,

[quote userid="98444" url="~/f/nordic-q-a/76682/spi-clock-pin-configuration-for-nrf52840/317304#317304"]I already have tried that example. The screenshots I have attached are from the same example. So, that's why I asked if you can provide me the example which is not included in the SDK examples.[/quote]

I see. I am not able to make any simpler example than that one, as it is minimal, so I think we need to look more at what you do instead, then. Perhaps you can show a complete project that reproduce this so that we see exactly what you do, as well as schematics for your custom board.

[quote userid="98444" url="~/f/nordic-q-a/76682/spi-clock-pin-configuration-for-nrf52840/317298#317298"]

So, if we want to use simple SPI peripheral (not using EasyDMA) with SPI0 instance, we need to set SPI0_ENABLED, SPI_ENABLED to 1 and we need to disable SPIM peripheral by setting NRFX_SPIM0_ENABLED, NRFX_SPIM_ENABLED to 0.

Firstly, I found in the spi_master_using_nrf_spi_mngr that NRFX_SPIM_ENABLED is set to 1. May I ask why is that so?

[/quote]

Unfortunately the driver configuration is a bit complex for legacy reasons. Generally, as you use the nrf_drv driver API (legacy API), the configuration macros starting with NRFX_ are irrelevant. What happens is that the macros starting with SPI* take precedence. and when it comes to using SPI or SPIM peripheral, that is decided by the value of SPI0_USE_EASY_DMA for instance 0, SPI1_USE_EASY_DMA for instance 1, etc.

(Note that the API is the same in both cases, and you typically want to use the SPIM peripheral as it uses DMA. The driver handles all the differences for you, but that is much more sensible in a real application as the CPU can do other work while the SPIM peripheral handles the transaction.)

[quote userid="98444" url="~/f/nordic-q-a/76682/spi-clock-pin-configuration-for-nrf52840/317298#317298"]Secondly, when I debug the same example on nrf52840, I can see the registers for both SPIM0 and SPI0 being configured with the same pins. Which can be a problem as described in the nrf52840 Product specifications. The document clearly says that only one peripheral can be associated to a particular pin at one point of time. [/quote]

I see hmolesworth explained this good. All peripherals with the same register base address share the same physical components, and cannot be used at the same time. It does not make sense to look at the register of the other with the same address etc.

[quote userid="98444" url="~/f/nordic-q-a/76682/spi-clock-pin-configuration-for-nrf52840/317298#317298"]I will appreciate if you can provide full settings for sdk_config.h or anything else, to use SPI0/SPIM0 with and without EasyDMA as I am not able to find any documentation on that. [/quote]

Just refer to the mentioned example and change the value of SPI0_USE_EASY_DMA. that is the only required change.

RE: SPI clock pin configuration for nRF52840.

Shivek — Fri, 25 Jun 2021 16:05:26 GMT

Hi hmolesworth,

Thanks for the clarification. I saw that happening with the bit0 of ENABLE register when only SPI0 is enabled and bits1 and bits2 set to 0 when I disabled the EasyDMA.

I can see pin toggling at serial clock pin but once only. Like it will go from high to low and then low to high but no serial clock. Will try to use SPIM0 instead of SPI0.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

Shivek — Fri, 25 Jun 2021 15:59:19 GMT

Hi Einar,

I already have tried that example. The screenshots I have attached are from the same example. So, that's why I asked if you can provide me the example which is not included in the SDK examples.

Looking forward for your response to other questions as well.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

hmolesworth — Fri, 25 Jun 2021 15:55:02 GMT

To clarify the peripherals, SPI0 and SPIM0 and TWI0 are all the same physical hardware peripheral, so only one can be used at any given time; to distinguish between SPI0 and SPIM0 the Enable bits are different - bit 0 enables the SPI peripheral and bits 1 and 2 additionally enable the Tx and Rx DMA (SPIM peripheral). Usually the only reason to not use DMA (SPIM) is to avoid the increased power drain caused by DMA.

Einar will be better able to describe the SDK settings; I prefer bare-metal which avoids those.

RE: SPI clock pin configuration for nRF52840.

Shivek — Fri, 25 Jun 2021 15:36:36 GMT

Hi Einar,

I found something not good with the SPI peripheral registers. According to my understanding, SPI driver from Nordic is associated with SPI peripheral interface master (page no. 398 of nrf52840 PS v 1.2) and SPIM driver is associated with SPIM with EasyDMA (page no. 406 of nrf52840 PS v 1.2).

Firstly, I found in the spi_master_using_nrf_spi_mngr that NRFX_SPIM_ENABLED is set to 1. May I ask why is that so?

Secondly, when I debug the same example on nrf52840, I can see the registers for both SPIM0 and SPI0 being configured with the same pins. Which can be a problem as described in the nrf52840 Product specifications. The document clearly says that only one peripheral can be associated to a particular pin at one point of time.

Following is the snapshot from debug mode when I try with the above mentioned example:

I tried writing directly to the ENABLE register of SPIM0 so to disable it. It didn't make a difference. Here is the configuration function code for SPI0 instance initialization.

        //GPIO configuration
        nrf_gpio_cfg_output(MEM_CS);
        nrf_gpio_cfg_output(MEM_SI);
        nrf_gpio_cfg_output(MEM_SCK);
        nrf_gpio_cfg_input(MEM_SO, GPIO_PIN_CNF_PULL_Pulldown);
        
        //SPI configuration
        nrf_drv_spi_config_t spi_config;// = NRF_DRV_SPI_DEFAULT_CONFIG;
        
        spi_config.ss_pin    = MEM_CS;
        spi_config.miso_pin  = MEM_SO;
        spi_config.mosi_pin  = MEM_SI;
        spi_config.sck_pin   = MEM_SCK;
        spi_config.bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST;
        spi_config.frequency = NRF_SPI_FREQ_250K;
        spi_config.mode      = NRF_SPI_MODE_2;
        
        //disabling the SPIM0.
        NRF_SPIM0->ENABLE    = 0;
        
        nrf_drv_spi_init(&spi, &spi_config, NULL, NULL);

I will appreciate if you can provide full settings for sdk_config.h or anything else, to use SPI0/SPIM0 with and without EasyDMA as I am not able to find any documentation on that.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

Einar Thorsrud — Fri, 25 Jun 2021 15:11:16 GMT

Hi Shivek,

I see you ask for an example which is not included in the SDK, but did you try the SPI Master Example? That is quite simple so if I was to make another example it would be basically the same. Have you tested that on your HW?

RE: SPI clock pin configuration for nRF52840.

hmolesworth — Fri, 25 Jun 2021 15:09:51 GMT

I am not getting anything on the clock pin -- at 250kHz clock I would think even a cheap 'scope would see that, but are you using (say) some low-cost analyser which might have too low a resolution?

p_tx_buffer,and sizeof(tx_buffer) are inconsistent (different buffers), maybe make the buffer size bigger so easier to see the clocks. Hopefully the buffer is not defined const ..

RE: SPI clock pin configuration for nRF52840.

Shivek — Fri, 25 Jun 2021 13:39:55 GMT

Hi Einar,

As I mentioned in my response to hmolesworth, I have tried using P0.13 as normal GPIO and tested toggling the pin, I was able to see the pin toggling on scope. But if I am using the same pin for SPI clock, it won't get any clock going on that pin.

Would you be able to send a simple example(other than which is included in SDK), which I can test on my hardware just by simply changing the pins?

I think that would make me clear that whether its a hardware issue or software issue.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

Shivek — Fri, 25 Jun 2021 12:33:45 GMT

Hi Hmolesworth,

Thanks for your time to give it a look. I have tried using P0.13 from nRF52840 as normal GPIO, and I was able to control the state of the pin, i.e., toggle the pin after some time. So, that's why I am sure about pin P0.13 and on top of that I tested with multimeter there is a connection from M2 connector pin(the pin which is connected to nRF52840 P0.13 pin on the LN60E840E module) to the connector header on the dev kit.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

Einar Thorsrud — Fri, 25 Jun 2021 10:53:48 GMT

Good points. Shivek: Perhaps it is worth configuring the SCK and other pins as normal GPIOs that you toggle, and check with a logic analyzer to verify that the pin mapping is actually what you think it is?

RE: SPI clock pin configuration for nRF52840.

hmolesworth — Fri, 25 Jun 2021 01:26:02 GMT

Confusing schematic, but it looks like nRF52840 P0.13 is not available on a pin; P013 may instead be the P0.13 pin on the nRF9160. Edit: oh, maybe it's the other way round which means it is available. Hmm ..

RE: SPI clock pin configuration for nRF52840.

Shivek — Thu, 24 Jun 2021 21:29:17 GMT

Hi Einar,

[quote userid="7377" url="~/f/nordic-q-a/76682/spi-clock-pin-configuration-for-nrf52840/317016#317016"]So you should at least remove the call to __disable_irq().[/quote]

I tried removing the line __disable_irq(). But it didn't help. I am still not able to see the clock on the pin. I tried the code with the board supplied by Fanstel. I have attached the document from them which has the schematic for the dev kit I am using. I will really appreciate if you can have a look on the document and let me know if there is anything I am doing wrong with the pin selection for the purpose.

devzone.nordicsemi.com/.../M2_5F00_LN60E40F_2B00_Product_2B00_Specifications.pdf

The LN60E40F is a module based on nRF9160 and nRF52840. For the schematic you can go to the page no. 25 of this document. The schematic is not having good resolution and that is frustrating for me as well.

Thank you for your efforts.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

Shivek — Thu, 24 Jun 2021 16:05:20 GMT

Hi Einar,

I am using SPI peripheral. I have enabled DMA using SPI0_USEE_EASY_DMA define in sdk_config.h. Here is the snippet from sdk_config file:

#ifndef SPI0_ENABLED
#define SPI0_ENABLED 1
#endif
// <q> SPI0_USE_EASY_DMA  - Use EasyDMA
 

#ifndef SPI0_USE_EASY_DMA
#define SPI0_USE_EASY_DMA 1
#endif

Thanks for responding back. I will try what you have told me and let you know.

Its good to know that we should not be accessing any pins if we have configured for any peripheral.

I will get back soon after trying.

Thanks once again.

Regards,

Shivek

RE: SPI clock pin configuration for nRF52840.

Einar Thorsrud — Thu, 24 Jun 2021 13:19:14 GMT

Hi,

Are you using the SPI or SPIM peripheral? (do you enable DMA or not in sdk_config.h)?

While that should not explain this issue, I notice that you control the CS signal yourself using nrf_gpio_pin_clear() before the transaction and nrf_gpio_pin_set() after (using just a delay which is more than long enough). In that case you should use NRF_DRV_SPI_PIN_NOT_USED when you configure the driver. Alternatively, keep your driver configuration and remove the controlling of the CS pin in your memId() function.

Regarding the issue itself I dot not immediately see what casues the issue, but you disable interrupts during the transaction, and this will cause problems for the driver which is interrupt driven. So you should at least remove the call to __disable_irq().

RE: SPI clock pin configuration for nRF52840.

Shivek — Wed, 23 Jun 2021 16:32:16 GMT

I forgot to add the event handler code so to explain further, here is the code for event handler function:

void spi_event_handler(nrf_drv_spi_evt_t const * p_event,
                       void *                    p_context)
{
    printf("\r\n Error : %ld", err);
}

Every time I am calling, memId I can see the chip select pin (MEM_CS) goes low and high. The delay in memId funciton is just for testing purpose. So, I can see the Error being printed as "0", that means the nrf_drv_spi_transfer() returns successfully. This is confusing me.

Looking forward for any help.