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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Regarding FIFO Count</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/7837/regarding-fifo-count</link><description>I have enabled data ready interrupt bit and also enabled the fifo bit and also enabled gyro_fifo and accel_fifo bits in mpu6050 so that when data ready interrupt occurs the gyro and accel data values get in fifo buffer.But on each interrupt the fifo count</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 14 Nov 2017 10:43:53 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/7837/regarding-fifo-count" /></channel></rss>