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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/78419/zephyr-uarte-library-missing-uart_rx_buf_released-events</link><description>I run newest nRF53 chip as of writing with 1.6.0 nRF Connect SDK from nRF Connect Toolchain manager 3.6.1 using SES 5.50c. 
 I use a array of 5 rx-buffers (Increased from 3 to figure out what was going on) and handle UART_RX_BUF_REQUEST and UART_RX_BUF_RELEASED</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 08 Feb 2022 02:44:07 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/78419/zephyr-uarte-library-missing-uart_rx_buf_released-events" /><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/351658?ContentTypeID=1</link><pubDate>Tue, 08 Feb 2022 02:44:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f84ae5ec-04af-42bf-9e58-615043c4f3ee</guid><dc:creator>JinJie</dc:creator><description>&lt;p&gt;Probably it is a race condition between uarte isr(ENDRX) and rx_timeout.&lt;/p&gt;
&lt;p&gt;set short timeout and small rx dma ram buffer size in rx_enable(..., dma buf size, timeout) would make it easiler to cause race condition rapidly.&lt;/p&gt;
&lt;p&gt;e.g. rx_enable(..., dmabuf_size = 20 byte, timeout = 5ms) and send plenty of bytes to uarte rx.&lt;/p&gt;
&lt;p&gt;By the way, I use nrf52833 NCS on zephyr 2.6.0.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/351479?ContentTypeID=1</link><pubDate>Mon, 07 Feb 2022 09:31:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:118ecb44-0bc6-486c-894a-69f68d947ee5</guid><dc:creator>JinJie</dc:creator><description>&lt;p&gt;Anything update plz?&lt;/p&gt;
&lt;p&gt;We met the same issue, and yet unable to determinate the reason.&lt;/p&gt;
&lt;p&gt;Currently,&lt;/p&gt;
&lt;p&gt;I found the normal function called chain when uarte rx receiving bytes:&lt;/p&gt;
&lt;p&gt;isr(rx started) -&amp;gt; callback(new buffer rsp) -&amp;gt; isr(end rx) -&amp;gt; callback(buffer release)&lt;/p&gt;
&lt;p&gt;PS: leave out the rx ready event cause it comes quiet frequently and&amp;nbsp;randomly.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;When we met this issue, we found&amp;nbsp;&lt;span&gt;isr(end rx) is not generate(missing endrx event or endrx interrupt mask), thus&amp;nbsp;callback(buffer release) was not execute.&amp;nbsp;&lt;/span&gt;&lt;span&gt;i.e. isr(rx started)&amp;nbsp;comes twice.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/328503?ContentTypeID=1</link><pubDate>Wed, 08 Sep 2021 07:32:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:466c470c-92f3-426a-b3a1-43beda0d523f</guid><dc:creator>Kyrre Aalerud</dc:creator><description>&lt;p&gt;I upploaded an image with the packets colorized around where the timing issue happens here:&amp;nbsp;&lt;a href="https://ibb.co/FxHkKTs"&gt;https://ibb.co/FxHkKTs&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="https://i.ibb.co/5MKX6HY/nordic-uarte-rx.png" /&gt;&lt;br /&gt;Each of the events are triggered in the driver which is running with 2ms on the timeout setting using 32 byte buffers to provoke it a bit.&lt;br /&gt;Data is sent as bursts (using dma from other mcu) of single packets with 20ms interval. After the last long packet there is a pause of 4.5 seconds before some shorter responses are sent and the long packets start again. The short packets are sent with 50 and 90ms intervalls and should have come as seperate clean rx events but it is like some internal alignment prevents this?&lt;/p&gt;
&lt;p&gt;Notice the RX timeout from my code discarding the end of the packet as it arrives 4.5s too late as part of next&amp;nbsp;rx event triggered by the new shorter datapackets. Note the timestamps.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/328486?ContentTypeID=1</link><pubDate>Wed, 08 Sep 2021 06:16:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:97b794fa-92cc-42b3-b975-972f4613db6d</guid><dc:creator>Susheel Nuguru</dc:creator><description>[quote user="Kyrre Aalerud"] if the transmission stops in the second buffer during this time (speculation) an rx even based on the timeout may not be generated.[/quote]
&lt;p&gt;&amp;nbsp;I think this should be the source of all the issue. If at any instance we can see that the timeout event is missing and did not fire at all, then that is a bug in the driver itself. The only issue before creating an internal ticket is that we need to prove it.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/328391?ContentTypeID=1</link><pubDate>Tue, 07 Sep 2021 12:33:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fef9fc58-5c50-43ea-8457-a72deacd6fa1</guid><dc:creator>Kyrre Aalerud</dc:creator><description>&lt;p&gt;For info, we have discovered some other anomaly with the rx events and the timeout system.&lt;/p&gt;
&lt;p&gt;It appears that if a stream of data is received, spanning multiple rx buffers, depending on&amp;nbsp;timing for processing the rx event caused by the first buffer end being reached, if the transmission stops in the second buffer during this time (speculation) an rx even based on the timeout may not be generated. Result is remaining data from the burst reception may sit in the second rx buffer and not generate any event. Only when a new burst of data (1 or more bytes) arrives later will the rx event be generated and it will also contain the missing data from the previous transmission.&lt;/p&gt;
&lt;p&gt;When using a internal timeout to resynchronize packets this creates a very bad situation.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324598?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2021 07:43:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8b135408-2daa-412b-8e3a-58de4fb8f9c4</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;Thank you for this data. This is very useful for us to understand. Any chances that you can share your project that we can run on our DK, will make it easy for us to reproduce and debug. If we try to replicate it we might end up spending a lot of time searching for that timing critical event which triggers this.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324595?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2021 07:36:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0a96430e-e0d9-47b2-9e1a-9d8e55a92f54</guid><dc:creator>Kyrre Aalerud</dc:creator><description>&lt;p&gt;Very rarely I do get events where an odd number of bytes are received. My test uses 4 byte blocks and we use timeout in the driver to create rx events in a timely fashion at the same time as we have a timeout for parsing data in 4 byte blocks. When the odd number of bytes arrive the first bytes are blocks of 4 and valid data. The last byte is garbage and since it is alone within the rx event timeline the next rx event is a normal 4xN byte event again and arrives so late that&amp;nbsp;our&amp;nbsp;timeout is triggered. The incomplete packet is then discarded and the new incoming data is parsed in it&amp;#39;s place. The data arriving are ACK&amp;#39;s to commands sent to a STSPIN32 based custom brushless motor-controller and it is very important to have reliable communications to it. We have had to use both 2 layers of timing (1 to get timely data parsing, 1 to secure resynchronization of datastream) and packet validation to have this communications work. The length of serial traces are approx 15mm.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;[01:32:09.484,832] &amp;lt;inf&amp;gt; hy5_uart: RX EVENT: rx.len=12 @ 5529484
[01:32:09.484,863] &amp;lt;err&amp;gt; hy5_uart: Buf FREE: 1 array: 1 0 0 1 1
[01:32:09.484,893] &amp;lt;err&amp;gt; hy5_uart: Buf REQ:  3 array: 1 1 0 1 1
[01:32:09.484,924] &amp;lt;inf&amp;gt; hy5_uart: ACK 134 @ 181190162
[01:32:09.484,924] &amp;lt;inf&amp;gt; hy5_uart: ACK 135 @ 181190162
[01:32:09.484,954] &amp;lt;inf&amp;gt; hy5_uart: ACK 136 @ 181190162
[01:32:09.488,922] &amp;lt;inf&amp;gt; hy5_uart: RX EVENT: rx.len=21 @ 5529488
[01:32:09.488,983] &amp;lt;inf&amp;gt; hy5_uart: ACK 137 @ 181190295
[01:32:09.488,983] &amp;lt;inf&amp;gt; hy5_uart: ACK 138 @ 181190295
[01:32:09.488,983] &amp;lt;inf&amp;gt; hy5_uart: ACK 139 @ 181190295
[01:32:09.489,013] &amp;lt;inf&amp;gt; hy5_uart: ACK 140 @ 181190295
[01:32:09.489,013] &amp;lt;inf&amp;gt; hy5_uart: ACK 141 @ 181190296
[01:32:09.688,323] &amp;lt;inf&amp;gt; hy5_uart: RX EVENT: rx.len=4 @ 5529688
[01:32:09.688,354] &amp;lt;err&amp;gt; hy5_uart: RX Timeout. 5529688-5529488=200. Discarded incomplete data of 1 byte.
&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324588?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2021 07:06:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6866ede8-8ef5-45ed-96f4-0eff92117f8c</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;for your reference, the internal ticket for the low level driver team to look at this is&amp;nbsp;NCSDK-10801&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324586?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2021 06:56:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dba55c2c-d02e-4ae9-ae68-953788f06811</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;Thanks for the detailed explanation.&amp;nbsp;&lt;/p&gt;
[quote user="Kyrre Aalerud"]My application checks the buffer reference and compares to it&amp;#39;s list of buffers to identify the buffer number being freed.[/quote]
&lt;p&gt;&amp;nbsp;This above explanation from you tells me that this most likely is a race condition in the uart driver where it missed this released event totally. I will create an internal ticket for the bug.&lt;/p&gt;
&lt;p&gt;It would be interesting info from you if you can confirm if the buffer with the missed released event had its buffer fully/partially filled? and also if the data in that buffer was relavant? Also would it be possible for you to give us a minimalistic project to reproduce this as this seems very timing related. This information will help the engineers focus on the code sections which are which cause this behavior.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Once again Thanks a lot for such a detail explanation and your experiments. But for now, since you are not doing dynamic allocation on request events and able to manage the round robin buffers in a good way (and also not losing data due to this bug) we hope that this bug will be fixed in the next releases.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324536?ContentTypeID=1</link><pubDate>Wed, 11 Aug 2021 15:43:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:009548d1-6074-4db0-a4d6-4b2fef6714ac</guid><dc:creator>Kyrre Aalerud</dc:creator><description>&lt;p&gt;My application checks the buffer reference and compares to it&amp;#39;s list of buffers to identify the buffer number being freed.&lt;br /&gt;The buffers are allocated statically so these values/pointers never change.&lt;/p&gt;
&lt;p&gt;Buf FREE x means it has identified the referenced buffer as buffer number x from 0 to 4.&lt;/p&gt;
&lt;p&gt;It always responds to a buffer request with the next buffer in succession and starts the system by setting up the enable rx call using buffer 0. The Buf 1 request event has been logged inbetween something else during startup and thus was missing in the log but happened correctly.&lt;/p&gt;
&lt;p&gt;Since I run a total of 5 buffers to debug this issue I see it usually always frees a buffer immediately once full, however this does not appear to always happen which leads me to believe the problem is either in the hardware or in the library during the handling of the events. I am thinking that there may exist a short timeframe where a flag may be set by hardware buy is cleared by software before or after the execution of the rx events callback etc.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324486?ContentTypeID=1</link><pubDate>Wed, 11 Aug 2021 12:54:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:128bfcc5-79de-4a86-b4c8-449ba6fded2a</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;This smells like a race condition but before that can you please explain to me what the number next to &amp;quot;Buf FREE X&amp;quot; means here? Is X something that is tracked by your application or you identify the index based on the buff pointer or you identify the buffer index freed based on some other logic?&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/398x537/__key/communityserver-discussions-components-files/4/3005.pastedimage1628686275083v3.png" /&gt;&lt;/p&gt;
&lt;p&gt;In the above highlighted context, why does your application think that Buf Free is index 1 instead of index 0?&lt;/p&gt;
&lt;p&gt;It looks like two buffer request can come in succession if second buffer is already given and is full before the application can process the&amp;nbsp;&lt;span&gt;UART_RX_RDY/UART_RX_BUF_RELEASED events.&amp;nbsp;This might be something undocumented behavior but might not necessary translate to a missed event. It is possible that the Free event got postponed and your application index tracking is now confused due to two buffer requests coming in succession.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324424?ContentTypeID=1</link><pubDate>Wed, 11 Aug 2021 10:06:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a4322f7f-fcde-497a-bfbc-3f63e89a657b</guid><dc:creator>Kyrre Aalerud</dc:creator><description>&lt;p&gt;Here is the same log with RX events as well. I had to compact it a bit to fit within 512k pastebin limits.&lt;br /&gt;&lt;a href="https://pastebin.com/15AJpMP9"&gt;https://pastebin.com/15AJpMP9&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324416?ContentTypeID=1</link><pubDate>Wed, 11 Aug 2021 09:42:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:780b8110-15cd-466e-89d9-2383c8d1dc0c</guid><dc:creator>Kyrre Aalerud</dc:creator><description>&lt;p&gt;The logs are very long before things happen so I had to use pastebin. Bottom of the log is the relevant part but all is included.&lt;/p&gt;
&lt;p&gt;&lt;a href="https://pastebin.com/1N7Ap8Pc"&gt;Log of REQ and FREE&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;The app keeps track of this array separately but it prints each event as they occur in the log.&lt;br /&gt;It is clear that a free event does not happen. It does ask for two buffers in quick succession without freeing buffer 3 though, but frees 3 right after.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Zephyr uarte library missing UART_RX_BUF_RELEASED events</title><link>https://devzone.nordicsemi.com/thread/324361?ContentTypeID=1</link><pubDate>Wed, 11 Aug 2021 06:46:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e1991612-574a-41f4-ad90-48aaadc6c644</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;Hi Kyrre,&lt;/p&gt;
&lt;p&gt;Sounds very much like a race condition. I need to understand more about the chain of events that happened before digging into the code. Could you please help me understand with these questions.&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Your application seems to be tracking which buffer is free and not instead of relying solely on these events. Is it possible that the application tracking logic might have a race condition? Could you rule that out?&lt;/li&gt;
&lt;li&gt;Could you provide me the chain of UART events that are received by your application (a log file with a way to see EVENTS/buffer mapping would help).&lt;/li&gt;
&lt;li&gt;What other application peripheral interrupts are enabled and being used when your application detected that a request arrived for a buffer that is not yet free?&lt;/li&gt;
&lt;/ol&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>