<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Soft device enable causes a Hard Fault</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/78933/soft-device-enable-causes-a-hard-fault</link><description>Hello, 
 I am developing an application using 
 1. SEGGER Embedded Studio. 
 2. SDK 17.0.2. 
 3. Cortex-M nrf 52840. 
 Recently I changed the OS from FreeRTOS to embOS and now I have a Hard fault that is caused by : 
 SVCALL(SD_SOFTDEVICE_ENABLE, uint32_t</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 26 Aug 2021 10:30:51 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/78933/soft-device-enable-causes-a-hard-fault" /><item><title>RE: Soft device enable causes a Hard Fault</title><link>https://devzone.nordicsemi.com/thread/326709?ContentTypeID=1</link><pubDate>Thu, 26 Aug 2021 10:30:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8b314edb-5114-4dcd-a8a3-8a194b5b71ae</guid><dc:creator>run_ar</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Unfortunately, we do not support embOS. I would recommend trying seggers support for embOS issue.&lt;/p&gt;
&lt;p&gt;In general I would say you should make sure you do not violate the Softdevice &lt;span&gt;&lt;a title="System on Chip resource requirements" href="https://infocenter.nordicsemi.com/topic/sds_s140/SDS/s1xx/sd_resource_reqs/sd_resource_reqs.html?cp=4_7_4_0_6"&gt;System on Chip resource requirements&lt;/a&gt; and also that you make sure you understand and follow the Softdevice &lt;a title="Interrupt model and processor availability" href="https://infocenter.nordicsemi.com/topic/sds_s140/SDS/s1xx/processor_avail_interrupt_latency/processor_avail_interrupt_latency.html?cp=4_7_4_0_15"&gt;Interrupt model and processor availability&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>