Needs to verify Power Supply for nRF52840

RE: Needs to verify Power Supply for nRF52840

Jared — Fri, 10 Sep 2021 11:11:33 GMT

Hi,

The ferrite beads shouldn't be necessary as far as I know. The nRF52 has pretty big decoupling capacitors which should take care of the noise.

regards

Jared

RE: Needs to verify Power Supply for nRF52840

jitendra_cf — Fri, 10 Sep 2021 10:23:28 GMT

Hi,

So one thing I can do here:

1. For normal voltage mode [3V coin cell battery]: Populate 0E resistor for FL2 inductor and Populate FL1 as it is.

2. For high voltage mode [LiPo battery] : Don not populate FL1 and populate only FL2

Is it a good idea?

RE: Needs to verify Power Supply for nRF52840

Jared — Fri, 10 Sep 2021 09:32:03 GMT

Hi,

I haven't tested normal voltage mode with the inductor still being connected between DCCH and VDD , but since the input(VDDH) of REG0 and the output(VDD) would be tied together, I think it should be fine. Worst case you would have to solder off the DCCH too when you switch mode.

regards

Jared

RE: Needs to verify Power Supply for nRF52840

jitendra_cf — Thu, 09 Sep 2021 10:46:29 GMT

Thanks Jared for your reply.

My intention is

1. to use NRF in normal voltage mode when use VBat=3V using Lithium Coin Cell by populating FL1 and FL2 both.

2. to use NRF in high voltage mode when VBat=3.7V using LiPo battery [which may be higher while charging] by populating only FL2 but not FL1.

Please correct me if anything is missing.

Thanks for other comments regarding RTC_INT pin, I will use other pin and also I confirm that C2 is 100nF. Antenna path is same as reference design from Nordic.

RE: Needs to verify Power Supply for nRF52840

Jared — Thu, 09 Sep 2021 09:48:27 GMT

Hi,

Is your intention to use the nRF in Normal voltage mode if you're using the coin cell by populating FL1 resulting in VBAT, VDD_nRF and VDDH_nRF being shorted together?

Overall what's important is the supply follows the requirement as described in the PS, namely in that it's stable and respects the minimum VDD rise time. Some other comments regarding your design:

The USB signal pins D+ and D- can not be used as normal GPIO pins. You should therefore move RTC_INT from D-
Can you confirm that C2 is 100 nF?
The antenna path should be as in the reference design. I can't tell if it is as the screenshot is cut a bit short.

regards

Jared