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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>UART break detection failed</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/80312/uart-break-detection-failed</link><description>Hello, 
 my application requires a reliable break detection (The serial data input is &amp;#39;0&amp;#39; for longer than the length of a data frame) sent from a peer device on the UART RxD line. 
 I use the SDK15.3.0 and expanded the code in nrf_serial.c/h so that I</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 07 Oct 2021 13:48:48 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/80312/uart-break-detection-failed" /><item><title>RE: UART break detection failed</title><link>https://devzone.nordicsemi.com/thread/333089?ContentTypeID=1</link><pubDate>Thu, 07 Oct 2021 13:48:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9f3521c3-8ae4-4ec1-85ab-2ddd74139007</guid><dc:creator>Jared</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
[quote user="Rainer303"]but write the ERRORSRC register with the fixed value of 0x0C to reset the framing and break bits. [/quote]
&lt;p&gt;The reset value is 0 for the ERRORSRC register. Setting it to 0x0C will set the framing and break bit to present. Could you instead modify the&amp;nbsp;&lt;span&gt;nrf_uarte_errorsrc_get_and_clear() by first checking which bit that is high and then resetting it by writing a 0 to the register?&lt;/span&gt;&lt;/p&gt;
[quote user="Rainer303"]&lt;p&gt;&lt;span style="font-size:inherit;"&gt;The delay of min 70us, which I inserted as a solution gives a timeslot in which the break bit can be set through the hardware in the ERRORSRC register.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;[/quote]
&lt;p&gt;Could you elaborate on the necessity for the delay?&lt;/p&gt;
&lt;p&gt;&lt;span&gt;regards&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;span&gt;Jared&amp;nbsp;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: UART break detection failed</title><link>https://devzone.nordicsemi.com/thread/332938?ContentTypeID=1</link><pubDate>Thu, 07 Oct 2021 07:14:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:76bc75ad-8dd2-47b5-9aa4-317873014e3b</guid><dc:creator>Rainer303</dc:creator><description>&lt;p&gt;Hello Jared,&lt;/p&gt;
&lt;p&gt;thanks for your reply.&amp;nbsp;&lt;/p&gt;
[quote userid="73165" url="~/f/nordic-q-a/80312/uart-break-detection-failed/332863#332863"]Not quite, the framing is effectively always generated before a break condition, but the&amp;nbsp;&lt;span&gt;nrf_uarte_errorsrc_get_and_clear() shouldn&amp;#39;t&amp;nbsp;clear the break bit in the ERRORSRC register when a framing error has happened.&amp;nbsp;&lt;/span&gt;[/quote]
&lt;p&gt;Yes, that shouldn&amp;acute;t happen. But the reading of the ERRORSRC register, triggered through the framing interrupt prevents the setting of the break bit in the ERRORSRC register. Inserting a delay in the function nrf_uarte_errorsrc_get_and_clear() helps a lot, Now I get the break condition event in my&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;span style="font-size:inherit;"&gt;uart_rxd_event_handler(). The minimum delay for a reliable break detection is 70us.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;div style="background-color:#ffffff;color:#000000;font-family:&amp;#39;Courier New&amp;#39;;font-size:12.0pt;font-style:normal;font-weight:normal;text-decoration:none;"&gt;
&lt;pre&gt;__STATIC_INLINE uint32_t &lt;span&gt;nrf_uarte_errorsrc_get_and_clear&lt;/span&gt;(NRF_UARTE_Type * p_reg)
&lt;span&gt;{&lt;/span&gt;
    &lt;span&gt;nrf_delay_us&lt;/span&gt;(&lt;span&gt;70&lt;/span&gt;);
    uint32_t errsrc_mask = p_reg-&amp;gt;ERRORSRC;
    p_reg-&amp;gt;ERRORSRC = errsrc_mask;
    &lt;span&gt;return&lt;/span&gt; errsrc_mask;
&lt;span&gt;}&lt;/span&gt;
&lt;/pre&gt;
&lt;/div&gt;
&lt;p&gt;With the knowledge that a break condition will be received, I changed the function nrf_uarte_errorsrc_get_and_clear() for a test case in such a way, that I does not read the ERRORSRC register but write the ERRORSRC register with the fixed value of 0x0C to reset the framing and break bits. This test works fine, I also get the&amp;nbsp;&lt;span&gt;break condition event (twice) in my&amp;nbsp;&lt;/span&gt;&lt;span style="font-size:inherit;"&gt;uart_rxd_event_handler(). With this test it&amp;acute;s obvious, that the reading of the ERRORSRC register triggered through the framing error condition detection prevents the setting of the break bit in the ERRORSRC register.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;div style="background-color:#ffffff;color:#000000;font-family:&amp;#39;Courier New&amp;#39;;font-size:12.0pt;font-style:normal;font-weight:normal;text-decoration:none;"&gt;
&lt;pre&gt;__STATIC_INLINE uint32_t &lt;span&gt;nrf_uarte_errorsrc_get_and_clear&lt;/span&gt;(NRF_UARTE_Type * p_reg)
&lt;span&gt;{&lt;/span&gt;
    &lt;span&gt;//nrf_delay_us(70);&lt;/span&gt;
    &lt;span&gt;//uint32_t errsrc_mask = p_reg-&amp;gt;ERRORSRC;&lt;/span&gt;
    uint32_t errsrc_mask = &lt;span&gt;0x0c&lt;/span&gt;;
    p_reg-&amp;gt;ERRORSRC = errsrc_mask;
    &lt;span&gt;return&lt;/span&gt; errsrc_mask;
&lt;span&gt;}&lt;/span&gt;&lt;/pre&gt;
&lt;/div&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;&lt;/span&gt;&lt;span style="font-size:inherit;"&gt;The delay of min 70us, which I inserted as a solution gives a timeslot in which the break bit can be set through the hardware in the ERRORSRC register.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;I would say, there is a hardware problem in the ERRORSRC register handling. A semaphore is missing when the hardware tries to set the break bit and the software simultaneously reads the ERRORSRC register.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;Best regards&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;Rainer&lt;/span&gt;&lt;/p&gt;
&lt;div style="background-color:#ffffff;color:#000000;font-family:&amp;#39;Courier New&amp;#39;;font-size:12.0pt;font-style:normal;font-weight:normal;text-decoration:none;"&gt;
&lt;div style="background-color:#ffffff;color:#000000;font-family:&amp;#39;Courier New&amp;#39;;font-size:12.0pt;font-style:normal;font-weight:normal;text-decoration:none;"&gt;
&lt;pre&gt;&lt;/pre&gt;
&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: UART break detection failed</title><link>https://devzone.nordicsemi.com/thread/332863?ContentTypeID=1</link><pubDate>Wed, 06 Oct 2021 14:00:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:aff6b4d0-1b0d-492d-b547-5df44a0ba447</guid><dc:creator>Jared</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
[quote userid="108907" url="~/f/nordic-q-a/80312/uart-break-detection-failed"]I read somewhere, that first a framing error is detected and afterwards a break condition is detected when a break condition is received from a peer device. All above means, that the framing interrupt with the following reading of the ERRORSRC register prevents the setting of the break bit in the ERRORSRC register.[/quote]
&lt;p&gt;Not quite, the framing is effectively always generated before a break condition, but the&amp;nbsp;&lt;span&gt;nrf_uarte_errorsrc_get_and_clear() shouldn&amp;#39;t&amp;nbsp;clear the break bit in the ERRORSRC register when a framing error has happened.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
[quote userid="108907" url="~/f/nordic-q-a/80312/uart-break-detection-failed"]But I never get the break condition, only a few framing error conditions in series. I checked the run-time behavior with a debugger. Setting a breakpoint directly at the beginning of the isr &amp;quot;uarte_irq_handler&amp;quot;, and after sending the break condition with the peer device, I can see that both bits, break and framing, in the ERRORSRC register are set.[/quote]
&lt;p&gt;So you can see that the break bit being set in the uarte_irq_handler but not in your&amp;nbsp;uart_rxd_event_handler() which you have added to the serial lib?? Could you post code that shows how you forward the ERRORSRC error to your modified handler?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;regards&lt;br /&gt;Jared&amp;nbsp;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>