ADC offset error calibration

RE: ADC offset error calibration

shuto kim — Fri, 12 Nov 2021 03:43:22 GMT

thank you. I will contact him.

shuto

RE: ADC offset error calibration

Jared — Wed, 10 Nov 2021 11:36:16 GMT

Hi,

We need an NDA before we can proceed with sharing any more information regarding the calibration routine.

Could you contact our regional sales manager for Japan and ask for an NDA. You can refer to Devzone case #277672

Mitsuo Yamazaki

mitsuo.yamazaki@nordicsemi.no

regards
Jared

RE: ADC offset error calibration

shuto kim — Tue, 09 Nov 2021 11:10:37 GMT

Hi,

I am an employee of a Japanese company called Murata Manufacturing, and I live in Japan.

regards

RE: ADC offset error calibration

Jared — Fri, 05 Nov 2021 10:54:42 GMT

Hi,

What company are you from and what country do you reside in?

regards

Jared

RE: ADC offset error calibration

shuto kim — Fri, 05 Nov 2021 00:19:36 GMT

thank you for your reply.

Let me ask you two additional questions.
(1) When AD conversion is performed using the internal reference, please tell me about the intersection of the reference voltage and the temperature feature.

(2) We want to further improve the ADC accuracy.
The nRF52832 Product Specification does not provide detailed principles for offset calibration. Can you tell me the principle? I would like to know if the accuracy can be improved by the timing and usage of offset calibration.
We are ready to conclude an NDA for that.

RE: ADC offset error calibration

Jared — Tue, 12 Oct 2021 09:17:06 GMT

Hi,

I think you're calibrating correctly, what you're observing is an effect of the calibration routine using an ADC with only 10 bit resolution. In your case it seems not using calibration would be better.

See this thread for more.

regards

Jared

RE: ADC offset error calibration

shuto kim — Tue, 12 Oct 2021 01:07:34 GMT

Thank you for your reply.

Could you give us a detailed explanation of (1)?

Or do you think we're offset calibrating correctly, even though we have a lot of variability?

RE: ADC offset error calibration

Jared — Mon, 11 Oct 2021 12:29:51 GMT

Hi,

No it's not fixed as it's dependent on external errors such as temperature.

regards

Jared

RE: ADC offset error calibration

shuto kim — Fri, 08 Oct 2021 08:56:45 GMT

Thank you for your reply.

If offset calibration is not performed, is the offset error range fixed? Is there a specification such as ± 2.0%?

RE: ADC offset error calibration

Jared — Thu, 07 Oct 2021 13:28:21 GMT

Hi,

There is indeed instances where the offset calibration might worsen results versus not using the calibration. This is often in instances where the SAADC is going to operate over a large temperature range. There is mainly two reasons for this:

1. We know that the offset changes with temperature, so it might actually be very close to a tripping point between two DAC values.

2. 2) We know that there is noise in the system (inherent thermal noise) which introduces sufficient randomness to flip the calibration values back and forth.

[quote user=""]The error with offset calibration was stated as ± 2LSB, but what is the error without offset calibration? Also, is it possible that the overall error including the gain error will be larger if offset calibration is applied?[/quote]

It will not affect the gain error. If you see that the samples are better without offset calibration, then you should not use it.

regards

Jared