Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

Einar Thorsrud — Thu, 17 Feb 2022 14:21:51 GMT

Hi Yaduvir,

I am sorry for the late reply. I have checked with the team workin on TF-M, and this is still not supported. It is being worked on though, and I will update here as soon as soon as we have some code in (pull requests) you can refer to.

Einar

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

ys4861@intel — Tue, 15 Feb 2022 03:58:43 GMT

I tried testing GPIO interrupts on Zephyr 3.0.0-rc1 on the nrf5340DK board. It still not working though the release has GPIO interrupts added to nrf5340DK. I do see that there is some implementation missing from GPIO interrupts implementation.

I wanted to enable interrupts on P0.0 - P0.7 pins of port0. and tested on both methods GPIOTE0 and GPIO but didnt receive any of the SLIH

1./home/osboxes/zephyrproject/modules/tee/tf-m/trusted-firmware-m/platform/ext/target/nordic_nrf/common/nrf5340/tfm_interrupts.c

+//spu_peripheral_config_non_secure((uint32_t)NRF_P0, false); (commented this line to enable Port 0 in secure mode)

Enable pin P0.0 - P0.7 interrupts

+//spu_gpio_config_non_secure(0, TFM_PERIPHERAL_GPIO0_PIN_MASK_SECURE, true);
+ spu_gpio_config_non_secure(0, 0x0f, true);

2.modules/tee/tf-m/trusted-firmware-m/platform/ext/target/nordic_nrf/common/nrf5340/target_cfg.c

Missing "struct tfm_peripheral_gpiote0", i added this.

#if TFM_PERIPHERAL_GPIOTE0_SECURE
struct platform_data_t tfm_peripheral_gpiote0 = {
NRF_GPIOTE0_S_BASE,
NRF_GPIOTE0_S_BASE + (sizeof(NRF_GPIOTE_Type) - 1),
};
#endif

3.modules/tee/tf-m/trusted-firmware-m/platform/ext/target/nordic_nrf/common/nrf5340/tfm_peripherals_def.h

3.1 This line was missing, so i added GPIOTE0

+extern struct platform_data_t tfm_peripheral_gpiote0;

+ #define TFM_PERIPHERAL_GPIOTE0 (&tfm_peripheral_gpiote0)

3.2 These macros are missing for GPIO Ports

TFM_GPIO0_IRQ, TFM_GPIO1_IRQ as GPIO0_IRQn number not defined in

4. modules/hal/nordic/nrfx/mdk/nrf5340_application.h

Missing, GPIO0_IRQn, GPIO1_IRQn define in the header.

5.modules/tee/tf-m/trusted-firmware-m/platform/ext/target/nordic_nrf/nrf5340dk_nrf5340_cpuapp/tfm_peripherals_config.h

Missing, added these lines

+#define TFM_PERIPHERAL_GPIOTE0_SECURE 1

+#define TFM_PERIPHERAL_GPIO1_SECURE 1

Questions:

1) Only GPIOTE0 IRQ number is defined in number 3) above. does that mean GPIO interrupts can be received through GPIOTE and not through GPIO directly?

2)Timer0 and Timer1 interrupts are working but not GPIO, is GPIO interrupts implemented in Zephyr 3.0.0-rc1?, There is no test for gpio interrupts in tfm_regression_test. i tested GPIO interrupts by adding a test and modifying ".yaml" file.

"irqs": [
{
"source": "TFM_GPIOTE0_IRQ",
"name": "TFM_GPIOTE0_IRQ",
"handling": "SLIH",
}

"irqs": [
{
"source": "TFM_GPIO0_IRQ",
"name": "TFM_GPIO0_IRQ",
"handling": "SLIH",
}

Build command is:

west build -b nrf5340dk_nrf5340_cpuapp_ns zephyr/samples/tfm_integration/tfm_regression_test

Thanks

Yaduvir

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

Einar Thorsrud — Mon, 25 Oct 2021 13:04:01 GMT

Hi Yaduvir,

I must admit this is quite new for us and there is a lot of work on this these days, so there are some differences between TF-M, Zephyr and NCS, and even between Zephyr 2.7.0 and Zephyr master.

The IRQ tests does not fully work on the Nordic platform yet, so you should not rely on them. There is a fix in this PR.

The tests use TIMER0, so if you are running the tests in addition to your other code you may need to use a different timer instance.

Regarding priorities, there are 8 interrupt priorities.

Einar

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

ys4861@intel — Mon, 25 Oct 2021 03:24:05 GMT

Hi Einar,

I see that 'tfm_slih_test' works on my nrf5340DK board. But not tfm_flih_test. “timer0_handler()” is called both in tfm_slih_test.c or our custom tfm service as long as “CONFIG_TFM_REGRESSION_NS=y” in tfm_regression_test client sample. Further by experimenting, I found that slih timer interrupt is called if I remove all tests except below 2 tests, and I see that ‘register_testsuite_ns_core_positive’ just returns a ‘CORE_TEST_ERRNO_SUCCESS’, ‘register_testsuite_ns_qcbor’ runs some 20 something qcbr lib test and nothing is related timer interrupt. But if these 2 test are run then timer0 interrupt always work. Commenting any of these tests just disable the timer interrupt.

static struct test_suite_t test_suites[] = {

/* List test cases which are compliant with level 1 isolation */

#if defined(TFM_PARTITION_INITIAL_ATTESTATION) || defined(FORWARD_PROT_MSG)

/* Non-secure QCBOR library test cases */

{&register_testsuite_ns_qcbor, 0, 0, 0},

#endif

/* Non-secure core test cases */

{&register_testsuite_ns_core_positive, 0, 0, 0},

/* End of test suites */

{0, 0, 0, 0}

};

I see that SLIH, timer0_handler is when TFM_TIMER0_IRQ_SIGNAL is received in psa_wait() and send by SPM. This is how SLIH is working in test suite and my own custom service as long as “CONFIG_TFM_REGRESSION_NS=y” is enabled as discussed above.

static void timer0_handler(void)

{

tfm_plat_test_secure_timer_stop();

psa_irq_disable(TFM_TIMER0_IRQ_SIGNAL);

}

static void slih_test_case_2(void) {

psa_irq_enable(TFM_TIMER0_IRQ_SIGNAL);

tfm_plat_test_secure_timer_start();

while (psa_wait(TFM_TIMER0_IRQ_SIGNAL, PSA_BLOCK) != TFM_TIMER0_IRQ_SIGNAL);

timer0_handler();

}

In tfm_plat_test.h, defines a macro that put the timer start function in Read-only section of the partition.

TFM_LINK_SET_RO_IN_PARTITION_SECTION("TFM_SP_SLIH_TEST", "APP-ROT")

tfm_plat_test_secure_timer_start, tfm_plat_test_secure_timer_stop

1. now I need to know why timer0 interrupt is working only when “register_testsuite_ns_qcbor” and “register_testsuite_ns_core_positive” is run in tests?

2. Any clue why FLIH timer interrupts not working?

3. What are the number of configurable priorities on your Interrupt Controller (NVIC)?

4. Is there any sample to enable GPTIOE or any other peripheral interrupt sample in TFM test suite? Currently, I see only the Timer interrupt sample.

Thanks

Yaduvir

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

Einar Thorsrud — Thu, 21 Oct 2021 12:32:18 GMT

Hello,

No update yet, unfortunately.

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

ys4861@intel — Wed, 20 Oct 2021 20:47:48 GMT

Hi Einar,

Do you have any updates on the issue?

Thanks

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

Einar Thorsrud — Mon, 18 Oct 2021 13:12:16 GMT

Thank you for the additional info. We are working on it and I will update here when we have something.

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

ys4861@intel — Fri, 15 Oct 2021 12:58:31 GMT

Step1,Step2
/*#####################################################################*/

modules\tee\tfm\trusted-firmware-m\platform\ext\target\nordic_nrf\common\nrf5340\tfm_peripherals_def.h
#ifndef __TFM_PERIPHERALS_DEF_H__
#define __TFM_PERIPHERALS_DEF_H__

#include <nrf.h>

#ifdef __cplusplus
extern "C" {
#endif

#define TFM_TIMER0_IRQ (TIMER0_IRQn)
#define TFM_TIMER1_IRQ (TIMER1_IRQn)
#define TFM_GPIOTE0_IRQ (GPIOTE0_IRQn)
#define TFM_SPIM4_IRQ (SPIM4_IRQn)

struct platform_data_t;

extern struct platform_data_t tfm_peripheral_std_uart;
extern struct platform_data_t tfm_peripheral_timer0;
extern struct platform_data_t tfm_peripheral_std_gpiote0;
extern struct platform_data_t tfm_peripheral_std_spim4;

#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart)
#define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0)
#define TFM_PERIPHERAL_GPIOTE0 (&tfm_peripheral_std_gpiote0)
#define TFM_PERIPHERAL_SPIM4 (&tfm_peripheral_std_spim4)
#define TFM_PERIPHERAL_FPGA_IO (0)

#ifdef __cplusplus
}
#endif

#endif /* __TFM_PERIPHERALS_DEF_H__ */

modules\tee\tfm\trusted-firmware-m\platform\ext\target\nordic_nrf\common\nrf5340\target_cfg.c

struct platform_data_t tfm_peripheral_timer0 = {
NRF_TIMER0_S_BASE,
NRF_TIMER0_S_BASE + (sizeof(NRF_TIMER_Type) - 1),
};

struct platform_data_t tfm_peripheral_std_uart = {
NRF_UARTE1_S_BASE,
NRF_UARTE1_S_BASE + (sizeof(NRF_UARTE_Type) - 1),
};

struct platform_data_t tfm_peripheral_std_gpiote0 = {
NRF_GPIOTE0_S_BASE,
NRF_GPIOTE0_S_BASE + (sizeof(NRF_GPIOTE_Type) - 1),
};

struct platform_data_t tfm_peripheral_std_spim4 = {
NRF_SPIM4_S_BASE,
NRF_SPIM4_S_BASE + (sizeof(NRF_SPIM_Type) - 1),
};

/*Secure partition manifest file change*/
samplepartition.yaml
{
"psa_framework_version": 1.1,
"name": "TFM_SP_sample",
# Possible options: "PSA-ROT | APPLICATION-ROT"
"type": "APPLICATION-ROT",
"priority": "NORMAL",
"model": "IPC",
"entry_point": "sample_partition_main",
"stack_size": "0x200",
"services": [
# Define the secure service here.
{
"name": "TFM_EXAMPLE_SERVICE",
# SIDs must be unique, ones that are currently in use are documented in
# tfm_secure_partition_addition.rst on line 184
"sid": "0x00001001",
"non_secure_clients": true,
"version": 1,
"version_policy": "STRICT"
},
],
# Define all the IRQs that the service wants to handle.
"mmio_regions": [
{
"name": "TFM_PERIPHERAL_GPIOTE0",
"permission": "READ-WRITE"
},
{
"name": "TFM_PERIPHERAL_SPIM4",
"permission": "READ-WRITE"
},
{
"name": "TFM_PERIPHERAL_TIMER0",
"permission": "READ-WRITE"
},
],
"irqs": [
{
"source": "TFM_GPIOTE0_IRQ",
"name": "TFM_GPIOTE0_IRQ",
"handling": "SLIH",
"tfm_irq_priority": 64,
},
{
"source": "TFM_SPIM4_IRQ",
"name": "TFM_SPIM4_IRQ",
"handling": "SLIH",
"tfm_irq_priority": 64,
},
{
"source": "TFM_TIMER0_IRQ",
"name": "TFM_TIMER0_IRQ",
"handling": "SLIH",
"tfm_irq_priority": 64,
}
],
"dependencies": [
"TFM_CRYPTO"
]
}

Step3, Step4
/*#####################################################################*/

/*Secure partition Code*/
sample_partition.c

#define TIMER_RELOAD_VALUE (1*1000*1000)
static void gpiote0_handler(void)
{
LOG_INFFMT("gpiote0_handler called!!\n");
psa_irq_disable(TFM_GPIOTE0_IRQ_SIGNAL);
psa_eoi(TFM_GPIOTE0_IRQ_SIGNAL);
}
static void spim4_handler(void)
{
LOG_INFFMT("spim4_handler called !\n");
psa_irq_disable(TFM_SPIM4_IRQ_SIGNAL);
psa_eoi(TFM_SPIM4_IRQ_SIGNAL);
}
static void timer0_handler(void)
{
LOG_INFFMT("timer0_handler called!\n");
psa_irq_disable(TFM_TIMER0_IRQ_SIGNAL);
psa_eoi(TFM_TIMER0_IRQ_SIGNAL);
}

static void timer_init(NRF_TIMER_Type * TIMER, uint32_t ticks)
{
nrf_timer_mode_set(TIMER, NRF_TIMER_MODE_TIMER);
nrf_timer_bit_width_set(TIMER, NRF_TIMER_BIT_WIDTH_32);
nrf_timer_frequency_set(TIMER, NRF_TIMER_FREQ_1MHz);
nrf_timer_cc_set(TIMER, NRF_TIMER_CC_CHANNEL0, ticks);
nrf_timer_one_shot_enable(TIMER, NRF_TIMER_CC_CHANNEL0);
}

static void timer_stop(NRF_TIMER_Type * TIMER)
{
nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_STOP);
nrf_timer_int_disable(TIMER, NRF_TIMER_INT_COMPARE0_MASK);
nrf_timer_event_clear(TIMER, NRF_TIMER_EVENT_COMPARE0);
}

static void timer_start(NRF_TIMER_Type * TIMER)
{
timer_stop(TIMER);
nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_CLEAR);
nrf_timer_int_enable(TIMER, NRF_TIMER_INT_COMPARE0_MASK);
nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_START);
}

void tfm_plat_test_secure_timer_start(void)
{
timer_init(NRF_TIMER0, TIMER_RELOAD_VALUE);
timer_start(NRF_TIMER0);
}

void tfm_plat_test_secure_timer_stop(void)
{
timer_stop(NRF_TIMER0);
}

void sample_partition_main(void)
{
psa_signal_t signals;

psa_irq_enable(TFM_SPIM4_IRQ_SIGNAL);
psa_irq_enable(TFM_GPIOTE0_IRQ_SIGNAL);

/*Start timer interrupt*/
psa_irq_enable(TFM_TIMER0_IRQ_SIGNAL);
tfm_plat_test_secure_timer_start();

/* Continually wait for one or more of the partition's RoT Service or
* interrupt signals to be asserted and then handle the asserted signal(s).
*/
while (1) {
signals = psa_wait(PSA_WAIT_ANY, PSA_BLOCK);

if (signals & TFM_GPIOTE0_IRQ_SIGNAL) {
gpiote0_handler();
}else if (signals & TFM_SPIM4_IRQ_SIGNAL) {
spim4_handler();
}else if (signals & TFM_TIMER0_IRQ_SIGNAL) {
timer0_handler();
} else {
psa_panic();
}
}
}
/*#####################################################################*/

RE: Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

Einar Thorsrud — Fri, 15 Oct 2021 11:51:24 GMT

Hi,

I am not sure about this to be honest, but I have asked the team working on TF-M support in the nRF Connect SDK to look at it.

In the mean time, can you explain a bit more about your configuration, and perhaps share a code example of what you have done? Did you get the GPIOTE and timer configuration in general to work in non-secure domain, so that this question is isolated to secure domain and TF-M? Please elaborate.