Managing Two SPI Masters and One SPI Flash Slavehttps://devzone.nordicsemi.com/f/nordic-q-a/80908/managing-two-spi-masters-and-one-spi-flash-slaveI currently use an NRF52810 to write a firmware in an external flash, then an STM32 will read this firmware and download it in its internal flash. The communication between the NRF flash and the flash STM is done by SPI. The problem I am facing is thaten-USTelligent Community 13Thu, 21 Oct 2021 11:38:47 GMTRE: Managing Two SPI Masters and One SPI Flash Slavehttps://devzone.nordicsemi.com/thread/335284?ContentTypeID=1Thu, 21 Oct 2021 11:38:47 GMT137ad170-7792-4731-bb38-c0d22fbe4515:f893e935-315e-4cb6-9d70-1f4606b4cdfeKenneth<p>Hello,</p> <p>I would have checked both the SPI pins (CLK, MISO and MOSI) and the Chip Select pin (CSN). Can it be that the STM32 is driving&nbsp;the CSN&nbsp;pin high, while the nRF52 is trying to drive&nbsp;CSN low? Maybe you can consider having a 10kohm pull-up on the CSN pin, and it&#39;s only driven low by the STM32 and nRF52 when in use?</p> <p>Do you have a logic analyzer trace of the SPI and CSN pins when driven by the nRF52?</p> <p>Kenneth</p><div style="clear:both;"></div>