RE: maximum clock possible on GPIO pin nrf51

Susheel Nuguru — Wed, 01 Nov 2017 08:15:43 GMT

Hi Milk, probably it was fixed later then. I will check that and update my answer soon.

RE: maximum clock possible on GPIO pin nrf51

Milk — Wed, 01 Nov 2017 02:22:55 GMT

Hi Aryan, Your opinion is SDK9.0 and SDK 8.1 should fix this problem,why SDK11 stay the same?

RE: maximum clock possible on GPIO pin nrf51

Susheel Nuguru — Mon, 16 Nov 2015 14:12:34 GMT

Thanks Sebastiano for coming back here to report your results.

RE: maximum clock possible on GPIO pin nrf51

sebastiano.xinet — Mon, 16 Nov 2015 10:36:52 GMT

Hi, we made some tests about the 8 MHz clock signal and the given code and, with the specific adaptation for our project, the results are positive so thanks for the tip.

RE: maximum clock possible on GPIO pin nrf51

sebastiano.xinet — Thu, 22 Oct 2015 09:47:14 GMT

Hi, thank you for the update! We'll check soon on our nrf51 if the frequency is okay and we'll reply to you the results. Thanks again.

RE: maximum clock possible on GPIO pin nrf51

Susheel Nuguru — Wed, 21 Oct 2015 11:06:02 GMT

Hi,

The given diagram is wrong, it was a measurement artifact. nRF51 was able to generate stable 8MHz clock this way. I checked this on oscilloscope. Apparently Logic analyser 16 sampling cannot be 100% trusted all the time.

RE: maximum clock possible on GPIO pin nrf51

sebastiano.xinet — Tue, 21 Jul 2015 08:00:43 GMT

Ok I'll try if I can use also the 4MHz signal for my clock. Thanks a lot for your fast and helpful answer.

RE: maximum clock possible on GPIO pin nrf51

Susheel Nuguru — Thu, 16 Jul 2015 10:10:31 GMT

We can generate 4MHz of stable clock with GPIOS, this is recommended and anything out of this is outside the spec.

RE: maximum clock possible on GPIO pin nrf51

Susheel Nuguru — Tue, 14 Jul 2015 16:53:35 GMT

i will have to investigate more about it, ill come back to you in two days, lets keep this thread open until then

RE: maximum clock possible on GPIO pin nrf51

sebastiano.xinet — Tue, 14 Jul 2015 16:01:05 GMT

Thanks a lot for your answer. Is it possible to find a solution for the gap problem? Because I need a continuous signal as carrier signal.

RE: maximum clock possible on GPIO pin nrf51

sebastiano.xinet — Tue, 14 Jul 2015 07:51:00 GMT

also the half of the HFCLK could be good. I'll wait for your test and answer. Thanks a lot.

RE: maximum clock possible on GPIO pin nrf51

Susheel Nuguru — Mon, 13 Jul 2015 19:14:54 GMT

you cannot get HFCLK bypassed to GPIO, you could probably get half of HFCLK if you configure Timers, GPIOTE and PPI correctly with shorts enabled. I will have to try this out myself tomorrow to confirm. If I succeed, i will give you the configuration for it.

Update_14.07.2015

Half of HFCLK can be routed to GPIO and This should work even with softdevice.

anyways as we are now testing the limits of events and tasks I see that there are few gaps happening every millisecond as you can see below. I am not sure if we can do anything about it.

Update_ 21.10.2015

The gaps found here in the diagram is a bug from Logic analyzer. Measuring this from oscilloscope showed that the given method gives clean 8MHz clock on pin number 5. I used this below code to test on PCA100028 on SDK9.0

#include <stdbool.h>
#include <stdint.h>
#include "nrf_delay.h"
#include "nrf_gpio.h"
#include "nrf_gpiote.h"
#include "boards.h"

#define TEST_PIN               5
#define GPIOTE_CHANNEL_NUMBER  0 

static void gpiote_init(void)
{
    // Configure GPIO_OUTPUT_PIN_NUMBER as an output.
    nrf_gpio_cfg_output(TEST_PIN);

    // Configure GPIOTE_CHANNEL_NUMBER to toggle the GPIO pin state with input.
    // @note Only one GPIOTE task can be coupled to an output pin.
    nrf_gpiote_task_configure(GPIOTE_CHANNEL_NUMBER, TEST_PIN, \
                           NRF_GPIOTE_POLARITY_TOGGLE, NRF_GPIOTE_INITIAL_VALUE_LOW);
}

static void timer2_init()
{
    // Start 16 MHz crystal oscillator.
    NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
    NRF_CLOCK->TASKS_HFCLKSTART    = 1;

    // Wait for the external oscillator to start up.
    while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0)
    {
        // Do nothing.
    }
    NRF_TIMER2->MODE        = TIMER_MODE_MODE_Timer;       // Set the timer in Timer Mode.
    NRF_TIMER2->PRESCALER   = 0;                          
    NRF_TIMER2->BITMODE     = TIMER_BITMODE_BITMODE_16Bit; // 16 bit mode.
    NRF_TIMER2->TASKS_CLEAR = 1;
    NRF_TIMER2->CC[0]       = 1;
    NRF_TIMER2->EVENTS_COMPARE[0] = 0;
    NRF_TIMER2->SHORTS    =
        (TIMER_SHORTS_COMPARE0_CLEAR_Enabled << TIMER_SHORTS_COMPARE0_CLEAR_Pos);
}

static void ppi_init(void)
{
    // Configure PPI channel 0 to toggle GPIO_OUTPUT_PIN on every TIMER2 COMPARE[0] match (200 ms)
    NRF_PPI->CH[0].EEP = (uint32_t)&NRF_TIMER2->EVENTS_COMPARE[0];
    NRF_PPI->CH[0].TEP = (uint32_t)&NRF_GPIOTE->TASKS_OUT[GPIOTE_CHANNEL_NUMBER];

    // Enable PPI channel 0
    NRF_PPI->CHEN = (PPI_CHEN_CH0_Enabled << PPI_CHEN_CH0_Pos);
}

/**
 * @brief Function for application main entry.
 */
int main(void)
{
    // configure TIMER2
    timer2_init();
   
    // configure PPI
    ppi_init();
    
    // configure GPIOTE
    gpiote_init();
    
    NRF_TIMER2->TASKS_START = 1;  // Start event generation.
    
    while(1);
}

Update

in SDK9.0 and SDK 8.1, nrf_gpiote.h nrf_gpiote_task_configure needs a fix for the above to work. update it with this code

__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
                                                nrf_gpiote_polarity_t polarity,
                                                nrf_gpiote_outinit_t  init_val)
{
    /* Check if the output desired is high or low */
    if (init_val == NRF_GPIOTE_INITIAL_VALUE_LOW)
    {
        /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
        on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the 
        correct state in GPIOTE but not in the OUT register. */
        NRF_GPIO->OUTCLR = (1 << pin);
        
        /* Configure channel to Pin31, not connected to the pin, and configure as a tasks that will set it to proper level */
        NRF_GPIOTE->CONFIG[idx] = (GPIOTE_CONFIG_MODE_Task       << GPIOTE_CONFIG_MODE_Pos)     |
                                             (31UL                          << GPIOTE_CONFIG_PSEL_Pos)     |
                                             (GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos);                                    
    } 
    else 
    {
        /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
        on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the 
        correct state in GPIOTE but not in the OUT register. */
        NRF_GPIO->OUTSET = (1 << pin);
        
        /* Configure channel to Pin31, not connected to the pin, and configure as a tasks that will set it to proper level */
        NRF_GPIOTE->CONFIG[idx] = (GPIOTE_CONFIG_MODE_Task       << GPIOTE_CONFIG_MODE_Pos)     |
                                             (31UL                          << GPIOTE_CONFIG_PSEL_Pos)     |
                                             (GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos);
    }

    /* Three NOPs are required to make sure configuration is written before setting tasks or getting events */
    __NOP();
    __NOP();
    __NOP(); 

    /* Launch the task to take the GPIOTE channel output to the desired level */
    NRF_GPIOTE->TASKS_OUT[idx] = 1;
    

    /* Finally configure the channel as the caller expects. If OUTINIT works, the channel is configured properly. 
       If it does not, the channel output inheritance sets the proper level. */
    NRF_GPIOTE->CONFIG[idx] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos)     |
                                         ((uint32_t)pin    << GPIOTE_CONFIG_PSEL_Pos)     |
                                         ((uint32_t)polarity      << GPIOTE_CONFIG_POLARITY_Pos) |
                                         ((uint32_t)init_val << GPIOTE_CONFIG_OUTINIT_Pos);

    /* Three NOPs are required to make sure configuration is written before setting tasks or getting events */
    __NOP();
    __NOP();
    __NOP(); 
}

I have raised an internal ticket for this, it will be solved.