About SPI opcode 0x03

RE: About SPI opcode 0x03

wiz_yoo — Fri, 21 Jan 2022 05:23:45 GMT

Hi, Håkon Holdhus

We will change interface QSPI to SPI.

So, there is no need to review the above item.

Thank you for support.

Best regrads,

Yoo

RE: About SPI opcode 0x03

haakonsh — Thu, 06 Jan 2022 14:37:38 GMT

Hey Yoo,

I'm afraid the QSPI peripheral only supports the specified Instruction set. The QSPI is tailored for flash devices and is not a generic QSPI peripheral. I will ask my colleagues if we have any work-around for this issue. If we could get any information on the display and it's spec we could tell you definitely whether we can support it or not.

BR,
Håkon Holdhus.

RE: About SPI opcode 0x03

wiz_yoo — Thu, 06 Jan 2022 02:00:31 GMT

Hi, Håkon Holdhus

Thank you for answer.

I know that this is not a regular SPI operation.

If not supported, we would like to make custom QSPI driver.

If you have any reference materials, please.

Best regrads,

Yoo

RE: About SPI opcode 0x03

haakonsh — Wed, 05 Jan 2022 13:10:16 GMT

There is one problem with custom instructions, the QSPI peripheral will operate as a regular SPI master, with one MISO and one MOSI. See Figure 3. Sending custom instruction in the Instruction set chapter.

RE: About SPI opcode 0x03

wiz_yoo — Mon, 27 Dec 2021 01:20:58 GMT

Dear haakonsh.

I am sorry for late reply.

Currently, I don't know the part number and only know what to implement.

The communication specifications currently provided are as follows.
- Write/read operation should be performed with IO0.

Is it supported by nRF52840 QSPI?

BR,

Thank you.

RE: About SPI opcode 0x03

haakonsh — Mon, 06 Dec 2021 12:26:52 GMT

Hey Yoo,

It depends on the device it is interfacing with, can you share a part number?

BR,

Håkon Holdhus