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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>NRF9160 zephyr SPI - CS stay low too long</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/82893/nrf9160-zephyr-spi---cs-stay-low-too-long</link><description>Hi, I&amp;#39;m working on nRF9160 with Zephyr (SDK 1.7.1) and one SPI device. I analyze CS signal with correlation to SPI SCK. Is that normal that CS signal stays low much longer than SCK signal? 
 For example: SPI SCK = 2 MHz: 
 CS goes low ~8us before SCK</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 24 Feb 2022 13:56:00 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/82893/nrf9160-zephyr-spi---cs-stay-low-too-long" /><item><title>RE: NRF9160 zephyr SPI - CS stay low too long</title><link>https://devzone.nordicsemi.com/thread/354844?ContentTypeID=1</link><pubDate>Thu, 24 Feb 2022 13:56:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:348c3297-9ea4-49cf-b291-6f00fb653ff0</guid><dc:creator>Mateusz Gancarczyk</dc:creator><description>&lt;p&gt;I figure out this problem - looks epic :) :&lt;br /&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1645710551077v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;I can&amp;#39;t share a code because it&amp;#39;s commercial but: &lt;br /&gt;it use 2 gppi channels. One connect SPIM Start event to gpiote toggle pin task and second connect SPIM end event and the same&amp;nbsp;&lt;span&gt;gpiote toggle pin task.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF9160 zephyr SPI - CS stay low too long</title><link>https://devzone.nordicsemi.com/thread/345755?ContentTypeID=1</link><pubDate>Mon, 03 Jan 2022 17:50:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1be0ca19-4f37-45ab-ae47-f9187ed8e14f</guid><dc:creator>Saleh</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;It seems the problem is coming from Zephyr side, a similar question was asked before and results show that this annoying delay is the normal behavior of the current Zephyr&amp;#39;s version.&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/81966/slow-spi-performance-with-zephyr"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/81966/slow-spi-performance-with-zephyr&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF9160 zephyr SPI - CS stay low too long</title><link>https://devzone.nordicsemi.com/thread/344267?ContentTypeID=1</link><pubDate>Mon, 20 Dec 2021 08:59:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:195f65d3-7021-4606-b13b-735ac3bd7337</guid><dc:creator>Sigurd</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I see similar results here.&lt;/p&gt;
&lt;p&gt;Zephyr SPI API:&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1639990385757v1.jpeg" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;nrfx driver(based on this example&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/70105/how-to-use-spi-interface-in-a-zephyr-sample-example/288587#288587"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/70105/how-to-use-spi-interface-in-a-zephyr-sample-example/288587#288587&lt;/a&gt;&amp;nbsp;)&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1639990398043v2.jpeg" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;When the CS pin is set high/low is handled in the SPI driver(SW). There could be ways to optimize the driver SW here, but if you need minimal/no latency here, and the SPI sensor support that, I would look into using &lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf9160/dppi.html"&gt;(D)PPI&lt;/a&gt; to toggle the GPIO.&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/63466/control-of-ss-pin-of-spi-with-ppi"&gt;https://devzone.nordicsemi.com/f/nordic-q-a/63466/control-of-ss-pin-of-spi-with-ppi&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>