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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/83277/fastest-spim-instance-pin-and-trace-pin-configuration</link><description>Hi, 
 This question is about 5340. I would like to use SPIM4 instance at fastest 32M speed. According to datasheet this instance needs to use dedicated pin assignments, and these pins happen to be trace pins as well. So I would like to clarify some ambiguities</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 06 Jan 2022 14:53:32 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/83277/fastest-spim-instance-pin-and-trace-pin-configuration" /><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/346524?ContentTypeID=1</link><pubDate>Thu, 06 Jan 2022 14:53:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c69aba95-39bc-479a-b370-82139a044aba</guid><dc:creator>rolandash</dc:creator><description>&lt;p&gt;Thanks a lot &lt;a href="https://devzone.nordicsemi.com/members/simonr"&gt;Simonr&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/346349?ContentTypeID=1</link><pubDate>Thu, 06 Jan 2022 07:26:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d8a8906e-21af-46ee-b532-fd81e9052aab</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Indeed, if you&amp;#39;re not able to use another CSN pin for SPIM4, you won&amp;#39;t be able to do tracing while using SPIM4, as these are the only pins supporting the TRACE feature.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/346177?ContentTypeID=1</link><pubDate>Wed, 05 Jan 2022 12:34:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f1cd714b-0851-4316-ad6c-629a25cc1763</guid><dc:creator>rolandash</dc:creator><description>&lt;p&gt;Thank you &lt;a href="https://devzone.nordicsemi.com/members/simonr"&gt;Simonr&lt;/a&gt; for the detailed explanation.&amp;nbsp;This clarified my first question.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I think this should address my 2nd question too, as I can use MCUSEL to set DCX pin to other function in similar way, and I assume that should not break the&amp;nbsp;normal SPI communication.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;About my 3rd question, I am still bit not very clear. In case using other pin for CSN does not work,&amp;nbsp;i.e., I still need to use P0.11 as dedicated CSN pin, then I have to multiplex this pin with TRACED0/SWD function.&lt;/p&gt;
&lt;p&gt;According to my reading so far, I need to explicitly in my code to set P0.11 to trace function in order to connect to debugger, so in that case the SPI function can not work in trace mode, am I right?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/346145?ContentTypeID=1</link><pubDate>Wed, 05 Jan 2022 11:54:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:03a88403-4503-4894-a28a-5d453f1880b4</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Input from our development team: We expect SPIM4 to work at 32MHz when MCUSEL is set to Peripheral for SCK/MOSI/MISO and MCUSEL is set to AppMcu for CSN with a different pin. However we must stress that there&amp;#39;s not been done timing analysis for this case, so we do not guarantee the high speed timing with the dedicated setting.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/345944?ContentTypeID=1</link><pubDate>Tue, 04 Jan 2022 14:20:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fd58150c-cf60-4d0b-8e57-d7cb6c709d18</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;I think you need to use the MCUSEL register to set the dedicated GPIO pins to be used for SPIM4 When the pin is assigned using the Periipheral option, the PSEL settings will be ignored. So if you want to use another GPIO for CSN. I think you can assign the &amp;quot;dedicated pin&amp;quot; to the application core (which is the default) and then use PSEL.CSN to select the pin you want to use for CSN.&amp;nbsp;&lt;a href="https://infocenter.nordicsemi.com/index.jsp?topic=%2Fps_nrf5340%2Fgpio.html&amp;amp;cp=3_0_0_6_12_0&amp;amp;anchor=doc_multiple_mcus"&gt;https://infocenter.nordicsemi.com/index.jsp?topic=%2Fps_nrf5340%2Fgpio.html&amp;amp;cp=3_0_0_6_12_0&amp;amp;anchor=doc_multiple_mcus&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I have also asked internally for a clear cut answer on how to do this properly, so this is just how I would imagine it&amp;#39;s done. I&amp;#39;ll update the ticket when I hear from our experts on the matter.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/345691?ContentTypeID=1</link><pubDate>Mon, 03 Jan 2022 14:05:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e0687467-2622-4908-9dc5-caea9cfcb29a</guid><dc:creator>rolandash</dc:creator><description>&lt;p&gt;Thank you &lt;a href="https://devzone.nordicsemi.com/members/simonr"&gt;Simonr&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;So at least it is possible technically. However as mentioned in datasheet, &amp;quot;SPIM PSEL settings are ignored&amp;quot; when 32M mode is active, does that mean I actually have no way to change the pin number used as CSN?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Fastest SPIM instance pin and Trace pin configuration</title><link>https://devzone.nordicsemi.com/thread/345679?ContentTypeID=1</link><pubDate>Mon, 03 Jan 2022 13:22:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c7d54aae-d573-4e43-b443-df7909b7bffa</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;I expect it would be OK to use another GPIO for CSN, but we haven&amp;#39;t done timing analysis for this case on our side. As for all high-speed interface signals, our recommendation is to keep CSN where it is as well to keep PCB traces as short as possible.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you try with another pin as the CSN pin and find that the CSN timing with respect to SCK or data is too tight for 32MHz with the new GPIO, you can try setting CSNDUR (&lt;a href="https://infocenter.nordicsemi.com/index.jsp?topic=%2Fps_nrf52833%2Fspim.html&amp;amp;resultof=%22%63%73%6e%64%75%72%22%20&amp;amp;anchor=register.IFTIMING.CSNDUR"&gt;IFTIMING.CSNDUR register&lt;/a&gt;) to a value of e.g. 2-4, as this will increase the distance between CSN transitions and the first/last SCK/data toggle.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>