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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to set the vdd level</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/83300/how-to-set-the-vdd-level</link><description>Hi 
 How to set the vdd level to 3.3v when the system is in the High Voltage mode?I can&amp;#39;t fine any api about setting vdd level in document.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 04 Jan 2022 13:19:15 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/83300/how-to-set-the-vdd-level" /><item><title>RE: How to set the vdd level</title><link>https://devzone.nordicsemi.com/thread/345918?ContentTypeID=1</link><pubDate>Tue, 04 Jan 2022 13:19:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1ece7df4-9b3c-44c1-99d9-d1519a2f8ab4</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;You can do something similar to the &lt;strong&gt;gpio_output_voltage_setup()&lt;/strong&gt; function in boards.c as part of your main application, and that should set the GPIO output voltage to 3.0V.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;/**
 * Function for configuring UICR_REGOUT0 register
 * to set GPIO output voltage to 3.0V.
 */
static void gpio_output_voltage_setup(void)
{
    // Configure UICR_REGOUT0 register only if it is set to default value.
    if ((NRF_UICR-&amp;gt;REGOUT0 &amp;amp; UICR_REGOUT0_VOUT_Msk) ==
        (UICR_REGOUT0_VOUT_DEFAULT &amp;lt;&amp;lt; UICR_REGOUT0_VOUT_Pos))
    {
        NRF_NVMC-&amp;gt;CONFIG = NVMC_CONFIG_WEN_Wen;
        while (NRF_NVMC-&amp;gt;READY == NVMC_READY_READY_Busy){}

        NRF_UICR-&amp;gt;REGOUT0 = (NRF_UICR-&amp;gt;REGOUT0 &amp;amp; ~((uint32_t)UICR_REGOUT0_VOUT_Msk)) |
                            (UICR_REGOUT0_VOUT_3V0 &amp;lt;&amp;lt; UICR_REGOUT0_VOUT_Pos);

        NRF_NVMC-&amp;gt;CONFIG = NVMC_CONFIG_WEN_Ren;
        while (NRF_NVMC-&amp;gt;READY == NVMC_READY_READY_Busy){}

        // System reset is needed to update UICR registers.
        NVIC_SystemReset();
    }
}&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to set the vdd level</title><link>https://devzone.nordicsemi.com/thread/345861?ContentTypeID=1</link><pubDate>Tue, 04 Jan 2022 10:36:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:81227be5-27b1-46c4-93c8-49115a0493ab</guid><dc:creator>helen</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; I use SES,How to set in SES,Thanks.&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1641292568979v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to set the vdd level</title><link>https://devzone.nordicsemi.com/thread/345854?ContentTypeID=1</link><pubDate>Tue, 04 Jan 2022 10:11:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d28ee8cb-b695-4a24-b087-0253d9ba1f0b</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;The output voltage from REG0 is set with the UICR_REGOUT0 register in the nrf52833_bitfields.h header file in the MDK&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;/* Register: UICR_REGOUT0 */
/* Description: Output voltage from REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - V_VDDH-VDD. */

/* Bits 2..0 : Output voltage from REG0 regulator stage. */
#define UICR_REGOUT0_VOUT_Pos (0UL) /*!&amp;lt; Position of VOUT field. */
#define UICR_REGOUT0_VOUT_Msk (0x7UL &amp;lt;&amp;lt; UICR_REGOUT0_VOUT_Pos) /*!&amp;lt; Bit mask of VOUT field. */
#define UICR_REGOUT0_VOUT_1V8 (0UL) /*!&amp;lt; 1.8 V */
#define UICR_REGOUT0_VOUT_2V1 (1UL) /*!&amp;lt; 2.1 V */
#define UICR_REGOUT0_VOUT_2V4 (2UL) /*!&amp;lt; 2.4 V */
#define UICR_REGOUT0_VOUT_2V7 (3UL) /*!&amp;lt; 2.7 V */
#define UICR_REGOUT0_VOUT_3V0 (4UL) /*!&amp;lt; 3.0 V */
#define UICR_REGOUT0_VOUT_3V3 (5UL) /*!&amp;lt; 3.3 V */
#define UICR_REGOUT0_VOUT_DEFAULT (7UL) /*!&amp;lt; Default voltage: 1.8 V */&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>