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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/84873/getting-reset-reason-as-watchdog-reset-after-image-update</link><description>Hi Team 
 We are using the Nrf52840 module for our dev purpose. As part of image update, we Erasing and load the new image to the chip by using Nrf connect App with Jlink Debugger. 
 After flashing is done, board is Reset and running, at that time when</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 17 Mar 2022 14:11:39 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/84873/getting-reset-reason-as-watchdog-reset-after-image-update" /><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/358688?ContentTypeID=1</link><pubDate>Thu, 17 Mar 2022 14:11:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:40dc14b6-a5d0-4b07-b275-ca5904d0603d</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;You need to specify what is happening before step 1. E.g. is there firmware with WDT before step 1?&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/358611?ContentTypeID=1</link><pubDate>Thu, 17 Mar 2022 11:25:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ce1a033c-5ddf-4e52-9b39-19be26242243</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&lt;/p&gt;
&lt;p&gt;Once again thanks for your reply.&lt;/p&gt;
&lt;p&gt;Yes there is no dependency between UICR and WDT and we need to feed to WDT all are fine. My doubt is,&lt;/p&gt;
&lt;p&gt;1. We have completely erased the flash - no WDT Settings in Flash&lt;/p&gt;
&lt;p&gt;2. We have reprogrammed the new Image with WDT Enabled - Flashing is done.&lt;/p&gt;
&lt;p&gt;3. Restarting the board means through Debugger Reset Pin.&lt;/p&gt;
&lt;p&gt;4. When we see the reset reason it shows as -Dog, At this stage the program still not reached the WDT Config Function, just resets the board and Reading the reset Register. in this case when and where the WDT is enabled, and why it is showing the Reset reason as -Dog.&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Srinivas.V&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/358539?ContentTypeID=1</link><pubDate>Thu, 17 Mar 2022 07:50:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1e0365b0-33eb-4873-91d4-0f7375bda89c</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;The watchdog peripheral is a independent peripheral, once started it will require to be fed, else it will timeout and trigger a watchdog reset. The only way to stop a watchdog is&amp;nbsp;a &amp;quot;hard&amp;quot; reset (e.g power cycle). I do not understand why you are mentioning UICR, there is no dependency between UICR and watchdog.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/358476?ContentTypeID=1</link><pubDate>Wed, 16 Mar 2022 15:13:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:55cab3c0-c492-48f4-8b37-c282949d1189</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Thanks for your reply.&lt;/p&gt;
&lt;p&gt;It means after&amp;nbsp;&lt;span&gt;flash erase/erase all operation we need to power cycle the board then reflash. After erase all operation without power cycle and with power cycle what is the difference.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;So after power cycle only it will update the WDT related UICR and other config Registers. please clarify me on this one.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Srinivas.V&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/358430?ContentTypeID=1</link><pubDate>Wed, 16 Mar 2022 12:45:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:64582465-88df-43d1-a531-02493e1aeed3</guid><dc:creator>Kenneth</dc:creator><description>[quote user="Srinivas V"]it means while erasing the complete code in flash will erase the&amp;nbsp;&amp;nbsp;watchdog configuration and register settings as well[/quote]
&lt;p&gt;How do you draw this conclusion? It&amp;#39;s not stopped or cleared by a flash erase/eraseall operation. So you need to eraseall, then power cycle the board, then reflash.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/358354?ContentTypeID=1</link><pubDate>Wed, 16 Mar 2022 09:12:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:97e79d57-88ce-4117-9349-726be2ad2e73</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&lt;/p&gt;
&lt;p&gt;Thanks for giving support.&lt;/p&gt;
&lt;p&gt;As per your explanation, we have enabled the watchdog and we are refeeding at the end of while loop every time.As part of reprogramming we are erasing and reflashing, it means while erasing the complete code in flash will erase the&amp;nbsp;&amp;nbsp;watchdog configuration and register settings as well .So if that is the case, after reflashing we are enabling and refeeding. So where is the gap for watchdog to trigger the timeout event in between after flashing and code start the execution. Somewhere i am getting interest on this point.&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Srinivas.v&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/354267?ContentTypeID=1</link><pubDate>Tue, 22 Feb 2022 07:58:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8babe55c-46a7-46a4-8d76-d214edfe3e1b</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&lt;/p&gt;
&lt;p&gt;Thanks for giving support.&lt;/p&gt;
&lt;p&gt;As per your explanation, we have enabled the watchdog and we are refeeding at the end of while loop every time.As part of reprogramming we are erasing and reflashing, it means while erasing the complete code in flash will erase the&amp;nbsp;&amp;nbsp;watchdog configuration and register settings as well .So if that is the case, after reflashing we are enabling and refeeding. So where is the gap for watchdog to trigger the timeout event in between after flashing and code start the execution. Somewhere i am getting interest on this point.&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Srinivas.v&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/354225?ContentTypeID=1</link><pubDate>Mon, 21 Feb 2022 20:29:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b587f771-eeb8-4d0b-b19e-043146f3c13d</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;If you enable watchdog at any time, then you need to feed/reload the watchdog, else it will timeout and trigger watchdog. This is the case even if you reflash the chip, only way to stop watchdog is a hard reset (power cycle or pin reset).&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/354044?ContentTypeID=1</link><pubDate>Mon, 21 Feb 2022 08:15:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:23e2ca44-694c-42c5-abb7-da95dcc3bbe2</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;HI Kenneth,&lt;/p&gt;
&lt;p&gt;I got your point, some times&amp;nbsp;&lt;span&gt;after a flash erase and reprogram also generates a reset condition. As explained to take the effect of UICR registers also some times needs Reset.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;But specifically getting the Reset Reason as &amp;quot;DOG&amp;quot; after flash erase or reprogramming is there any specific reason, like which is causing this one like UICR registers or some other source.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Could you please provide more clarity on this one.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Srinivas.V&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/354012?ContentTypeID=1</link><pubDate>Sun, 20 Feb 2022 18:36:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:817ba2d7-89f5-490a-806c-45872daab394</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;(Sorry if this reply doesn&amp;#39;t align with last message)&lt;/p&gt;
&lt;p&gt;Reset is not always what you expect; to be sure power-cycle and power on &lt;strong&gt;&lt;em&gt;at least twice&lt;/em&gt;&lt;/strong&gt; before looking at the reset reason to prove the scenarion you describe, as a single power cycle often generates a reset before you get to user code which looks at the reset reason and therefore shows the wrong reset reason. Alternatively place the code which captures the reset reason at the start of the following function, as this function often generates a reset (for example to apply reset pin programming) after a flash erase and reprogram. This function runs before &lt;em&gt;main()&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;// User information configuration registers (UICR) are written in the same way as Flash. After UICR has been
// written, UICR registers that configure HW (offset 0x200 or higher), including REG0 &amp;amp; Reset pin, require
// a reset to take effect since UICR is only read during startup.
void SystemInit(void)
{
    blah-blah
    // UICR changes require a reset to be effective
    NVIC_SystemReset();
...
}&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/354011?ContentTypeID=1</link><pubDate>Sun, 20 Feb 2022 18:03:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:918bfd4c-0de2-4c7b-8a9f-58e1c910a1e2</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&lt;/p&gt;
&lt;p&gt;Thanks for your reply.&lt;/p&gt;
&lt;p&gt;we have followed the sequence what you have suggested in previous reply in point 2.&lt;/p&gt;
&lt;p&gt;2. Completely erase the board,&amp;nbsp;&lt;span&gt;POWER CYCLE THE BOARD,&amp;nbsp;&amp;nbsp;and reflash it again and after that we have Read and output and clear the Reset Reason. In this case the out put showing Reset Reason as&amp;nbsp;&amp;quot;-RESETPIN&amp;quot; , not as &amp;quot;DOG&amp;quot;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;If we do the Flash erase, Reflash the New Image and&amp;nbsp;POWER CYCLE THE BOARD, in this sequence we are getting the Reset Reason as &amp;quot;-DOG&amp;quot;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;What is difference between these two sequences, if we do flash without power cycle what&amp;#39;s happened inside the Registers. Can you please give me or explain the difference.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Srinivas.V&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/353992?ContentTypeID=1</link><pubDate>Sat, 19 Feb 2022 20:16:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f5c365c7-e5fa-46bb-9e6d-5af0c11cf548</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;I suggest to change to:&lt;/p&gt;
&lt;p&gt;&lt;span&gt;2. Completely erase the board, POWER CYCLE THE BOARD, and reflash it again and after that Read and output and clear the Reset Reason , in this case the out put showing Reset Reason as&amp;nbsp;&amp;quot;???&amp;quot;.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/353988?ContentTypeID=1</link><pubDate>Sat, 19 Feb 2022 17:51:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:66359af3-016f-4db4-ad7a-68ac0b2a7424</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&lt;/p&gt;
&lt;p&gt;Once again thanks for your reply. we both are not getting into point what i am expecting, here two&amp;nbsp; scenarios with the same code base i am explaining,&lt;/p&gt;
&lt;p&gt;1. Just Reset the board and Read the Reset reason output and clear , the output showing Reset Reason as&amp;nbsp;&lt;span&gt;&amp;quot;-RESETPIN&amp;quot;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;2. Completely erase the board and reflash it again and after that Read and output and clear the Reset Reason , in this case the out put showing Reset Reason as&amp;nbsp;&amp;quot;DOG&amp;quot;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;3. Yes , in our application&amp;nbsp;we are enabled the Watchdog timer in the main function and in while loop we are re feeding every time, i am adding the code snippet for that&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;void main()
{   log_init();                                                         //NRF log    
    hal_timers_init();                                                  //HAL Timers Init
    leds_init();                                                        //NRF LED&amp;#39;s Init
    power_management_init();                                            //NRF Power Management Init
    (void)UTL_get_resetreason();                                              //HAL Rese Reason
    nrf_power_resetreas_clear(nrf_power_resetreas_get());               //NRF Clear after reset
    hal_rtc_initialize();                                               //HAL initialization of RTC2 for calender.
    ble_sb_initialize();                                                //HAL BLE Init
    hal_scheduler_init();                                               //NRF Scheduler Init
    nrf_mem_init();                                                     //NRF Memory Init
    hal_eeprom_initialize(&amp;amp;config);                                     //HAL EEPROM Init
    nrf_crypto_init();                                                  //NRF Crypto Init
    rtcInterfaceInit();          				                        //APP RTC Init for calender time
     
    hal_Wdt_Config_Enable();
    Read_Error_log_Write_Index();
    Update_Error_Diag_Log_Reset_Reason_Data();
    
    // Enter main loop.
    for (;;)
    { 
        sb_main();                                                                     //SB SoftBroker Main
        hstForeverReadAndHandoffNextPacket();                                          //HAL ECI Receive
        //if ((false == hal_ble_connection_state()) || (CDsIsStillCardData()))         // TODO Will see it later is it really required OR not.
        hstComTaskFxn();                                                               //HAL ECI Com Task
        idle_state_handle();                                                           //NRF idle state handling
        app_sched_execute();                                                           //NRF scheduler  
        hal_Wdt_Feed();                                                                //Re-feeding at the end of the while loop every time.
    }
}&lt;/pre&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Here our doubt was why we are getting Reset Reason as&amp;nbsp;&amp;quot;DOG&amp;quot;,as explained in 2 Point, instead of&amp;nbsp; &lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;quot;-RESETPIN&amp;quot;, or after erase and Flash by default it should show the Reset Reason as &amp;quot;-DOG&amp;quot; Only, just need clarification on this that sit. Actually QA Team has raised one issue on this , just need clarification from Nordic People, based on that we will close the Defect.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Regards,&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Srinivas.V&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/353977?ContentTypeID=1</link><pubDate>Sat, 19 Feb 2022 12:33:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:250d8dd0-771a-4775-8be9-8837c3ea24ec</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;I am not sure how much time we should spend on this. But I did try a very simple main() where I simple read, output and cleared resetreas. Nothing else in main(). I am not able to see watchdog reset set on startup, are you sure your application is not enabling watchdog at any time, and when you are programming the watchdog timeout?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/353941?ContentTypeID=1</link><pubDate>Fri, 18 Feb 2022 17:48:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:87d29bbe-56c4-4613-89c3-2312fc446f9f</guid><dc:creator>Srinivas V</dc:creator><description>&lt;p&gt;Hi Kenneth,&lt;/p&gt;
&lt;p&gt;Thanks for your reply. On main function at every start up, we are reading and clearing the Reset reason.&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;nrf_power_resetreas_get();&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; nrf_power_resetreas_clear(nrf_power_resetreas_get()); //NRF Clear after reset&lt;/p&gt;
&lt;p&gt;Here our doubt is what is expected reset reason when we do the Flash Erase followed new image update with Nrf Connect with jLINK Debugger.&lt;/p&gt;
&lt;p&gt;when we reset the board without flashing &lt;span&gt;it is showing the Reset reason as&amp;nbsp; &amp;quot;-RESETPIN&amp;quot;., but when we erase and flash the board after that when we read the Reset reason showing the reset reason as Watchdog Reset &amp;quot;DOG&amp;quot;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Here why it is showing two different&amp;nbsp;Reset reasons, can you please clarity on this one.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Sinivas.V&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Getting Reset Reason as Watchdog Reset after image update</title><link>https://devzone.nordicsemi.com/thread/353888?ContentTypeID=1</link><pubDate>Fri, 18 Feb 2022 14:31:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:13009207-1e55-483e-89b6-61a7bd4b6c33</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Remember that after reading the RESETREAS register you must clear it by writing &amp;#39;1&amp;#39; to all bits, since the RESETREAS register is retained and can store previous reset values if not cleared.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>