<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SWD programming NVMC maximum write size between wait for ready</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/85011/swd-programming-nvmc-maximum-write-size-between-wait-for-ready</link><description>Our application requires that we are able to program the nRF52832 device from our host microcontroller, in order to upgrade the nRF52832 firmware. 
 We are using an SPI peripheral on our host micro in order to communicate with the SWD peripheral on the</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 01 Jun 2022 14:08:50 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/85011/swd-programming-nvmc-maximum-write-size-between-wait-for-ready" /><item><title>RE: SWD programming NVMC maximum write size between wait for ready</title><link>https://devzone.nordicsemi.com/thread/370486?ContentTypeID=1</link><pubDate>Wed, 01 Jun 2022 14:08:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:10ba347e-69d8-43cc-8162-2c2174a32897</guid><dc:creator>Emil Lenngren</dc:creator><description>&lt;p&gt;It is possible to skip reading the Ready register entirely. Just continuously write the data (make sure you write a new target base address when crossing 4096 byte boundary though if you use the auto-increment feature). What will happen if you write too fast (faster than the flash write speed) is that the device will return WAIT instead of OK for the swd ack. Just try again repeating the same write&amp;nbsp;in that case until you get OK. If you tune the SWD speed you can find an optimal SWD Hz that will not result in any waits. We have&amp;nbsp;flashed hundreds and thousands of nrf52811 devices this way without any issues. Not sure about nrf52832 though, but I would assume it works similarly.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SWD programming NVMC maximum write size between wait for ready</title><link>https://devzone.nordicsemi.com/thread/354528?ContentTypeID=1</link><pubDate>Wed, 23 Feb 2022 10:38:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e3b78436-0e90-4751-93fd-0175d54458d8</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I consulted our toolchain team regarding your questions. They have the following suggestions:&lt;/p&gt;
&lt;p&gt;Instead of writing directly to flash through NVMC, write a small program in RAM that acts as a RAM bootloader. This program runs on the device and copies data from a RAM buffer to an address in flash. This small program can write to the NVMC and read the READY signal.&amp;nbsp;If you implement double buffer method in RAM, you can write into one buffer while the bootloaders writes from the other buffer to flash.&amp;nbsp;RAM can be written using auto incrementation without issue.&lt;/p&gt;
&lt;div&gt;There aren&amp;#39;t any other ways to read the ready flag unfortunately.&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;Best regards,&lt;br /&gt;Jørgen&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>