RE: WDT resets the board during DEBUG

Einar Thorsrud — Tue, 19 Apr 2022 10:22:20 GMT

Hi,

The WDT is just a simple downwards counting timer, and whenever it reaches 0 a reset occurs (after a short delay of two 32.768 kHz clock cycle). And the WDT is restarted to the configured reload value whenever it is fed/kicked, so then it starts counting down from that value again (must happen on all enabled channels in case more than one channel is enabled). There is no more logic than that, so a WDT reset in itself does not imply any other issue than that the WDT is not fed fast enough.

[quote user=""]How can I prevent the WDT from reseting the board during DEBUG process?[/quote]

Normally it makes sense to disable the WDT while debugging, as when debugging (pausing, stepping, breaking, etc), you change the timing of things and may not feed the WDT fast enough. As this is a special case it is typically better to simply not enable the WDT in this case rather than to introduce some special handling or complexities for this situation. That said, the WDT supports being paused when the debugger has halted the CPU by setting HALT to 0 in the CONFIG register (if using the driver, use for instance NRF_WDT_BEHAVIOUR_RUN_SLEEP).