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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to update softdevice via SPI in nRF52832</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/87345/how-to-update-softdevice-via-spi-in-nrf52832</link><description>Hi, 
 In our current proprietary design, we use bootloader with SPI function to update App. However in our application, we&amp;#39;d like to update proprietary to standard BLE via SPI interface. 
 For App part update, we think it&amp;#39;s doable. But for softdevice</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 29 Apr 2022 10:45:51 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/87345/how-to-update-softdevice-via-spi-in-nrf52832" /><item><title>RE: How to update softdevice via SPI in nRF52832</title><link>https://devzone.nordicsemi.com/thread/365558?ContentTypeID=1</link><pubDate>Fri, 29 Apr 2022 10:45:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b955d66c-706b-4171-905d-b2df5b2d81d3</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;OK, the entry point after reset is always at address 0x0 so an update of the bootloader will have a critical window where a reset will brick device.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Have you checked that flash protection is not enabled for the bootloader (&lt;span&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/bprot.html?cp=4_2_0_11#concept_gdr_qlx_vr"&gt;BPROT — Block protection&lt;/a&gt;&lt;/span&gt;) and that interrupts are not forwarded via the bootloader but directly to APP1/APP2 by using the &lt;a href="https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-control-block/vector-table-offset-register"&gt;VTOR&lt;/a&gt; register?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to update softdevice via SPI in nRF52832</title><link>https://devzone.nordicsemi.com/thread/365550?ContentTypeID=1</link><pubDate>Fri, 29 Apr 2022 10:07:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d1e686a3-6470-4814-88e9-71ca2b0465a8</guid><dc:creator>ChenC Tai</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Our bootloader is put at 0x00000000, and occupy 2 pages (8KB), it will help to jump to APP1 / APP2.&lt;/p&gt;
&lt;p&gt;But we found we cannot update bootloader by APP1 / APP2,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;When APP1/ APP2 try to erase 0x00000000, the NRF52832 crashed.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to update softdevice via SPI in nRF52832</title><link>https://devzone.nordicsemi.com/thread/365347?ContentTypeID=1</link><pubDate>Thu, 28 Apr 2022 09:09:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7286c40a-6edb-4c30-b351-adccbe4acbdb</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;What does your memory layout look like now? Is it the bootloader that starts at address 0x0?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to update softdevice via SPI in nRF52832</title><link>https://devzone.nordicsemi.com/thread/365283?ContentTypeID=1</link><pubDate>Thu, 28 Apr 2022 03:57:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:88a24649-6851-4be9-870f-c8e71c520d02</guid><dc:creator>ChenC Tai</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Thanks. In our test, if we tried to&amp;nbsp;&lt;span&gt;erase memory address 0x00 and start write MBR data, but happened hard fault. Do you have any suggestion for this issue?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Thanks,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;ChenC&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to update softdevice via SPI in nRF52832</title><link>https://devzone.nordicsemi.com/thread/365135?ContentTypeID=1</link><pubDate>Wed, 27 Apr 2022 09:21:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b7c810cd-da65-4551-9e01-67ef6d865d36</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I think you should be able to update the Softdevice along with the application over SPI provided your existing SPI bootloader doesn&amp;#39;t overlap with the Softdevice in flash.The Softdevice+MBR is not relocatable and must therefore always start at address 0x0.&lt;/p&gt;
&lt;p&gt;Memory layout used with the nRF5 SDK bootloader for comparison:&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/320x240/__key/communityserver-discussions-components-files/4/pastedimage1651051240304v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Vidar&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>