Clarification on how to generate a 10kHz sine wave with PWM and DMA

RE: Clarification on how to generate a 10kHz sine wave with PWM and DMA

robca — Thu, 23 Jun 2022 16:29:35 GMT

Perfect, thanks for the explanation and additional code. Now it all makes sense again 🙂

RE: Clarification on how to generate a 10kHz sine wave with PWM and DMA

hmolesworth — Thu, 23 Jun 2022 03:44:49 GMT

You are correct, I was being misleading. I've attached a simple snippet of low-level code which generates a short burst, though not at the frequency you are looking for. There is also the possibility to use multiple PWMs out-of-phase to generate additional steps if you need to generate a cleaner sine wave.

#define PWM_PIN (PIN_FEATHER_D6)
#define PWM_STEPS 800
uint16_t buf[PWM_STEPS];
void TestPWM(void)
{
  // Build (say) ramp - Ramp up/Down
  for (uint32_t i=0; i<PWM_STEPS/2; i++)
  {
     buf[i] = 0x8000 | 2*i;
     buf[PWM_STEPS-i-1] = 0x8000 | 2*i;
  }
  // Start crystal HFCLK
  NRF_CLOCK->TASKS_HFCLKSTART = 1;
  while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) ;
  NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
  // Configure PWM_PIN as output, drive low
  NRF_GPIO->DIRSET = (1 << PWM_PIN);
  NRF_GPIO->OUTCLR = (1 << PWM_PIN);
  NRF_PWM0->PRESCALER   = PWM_PRESCALER_PRESCALER_DIV_1; // 16 MHz clock
  NRF_PWM0->PSEL.OUT[0] = PWM_PIN;
  NRF_PWM0->MODE        = (PWM_MODE_UPDOWN_UpAndDown << PWM_MODE_UPDOWN_Pos);
  NRF_PWM0->DECODER     = (PWM_DECODER_LOAD_Common << PWM_DECODER_LOAD_Pos) | (PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);
  NRF_PWM0->LOOP        = 100;
  NRF_PWM0->COUNTERTOP = PWM_STEPS;
  NRF_PWM0->SEQ[0].CNT = ((sizeof(buf) / sizeof(uint16_t)) << PWM_SEQ_CNT_CNT_Pos);
  NRF_PWM0->SEQ[0].ENDDELAY = 0;
  NRF_PWM0->SEQ[0].PTR = (uint32_t)&buf[0];
  NRF_PWM0->SEQ[0].REFRESH = 0;
  NRF_PWM0->SEQ[1].CNT = ((sizeof(buf) / sizeof(uint16_t)) << PWM_SEQ_CNT_CNT_Pos);
  NRF_PWM0->SEQ[1].ENDDELAY = 0;
  NRF_PWM0->SEQ[1].PTR = (uint32_t)&buf[0];
  NRF_PWM0->SEQ[1].REFRESH = 0;
  // Stop after burst
  NRF_PWM0->SHORTS = NRF_PWM_SHORT_LOOPSDONE_STOP_MASK;
  NRF_PWM0->ENABLE = 1;
  NRF_PWM0->TASKS_SEQSTART[0] = 1;
}

RE: Clarification on how to generate a 10kHz sine wave with PWM and DMA

robca — Thu, 23 Jun 2022 00:08:30 GMT

Yes, thanks. I understand how the prescalers relate to the clock and PWM frequency.

Let's use 16MHz clock and 40 COUNTERTOP, as in your example. That means that each single PWM pulse is at 16MHz, and I need 40 of those to represent every possible number from 0 to 40. So I have only 400kHz "values" with which to form a sine wave. Let's call COUNTERTOP the vertical resolution of the XY sine graph. So I have 40 Y values to play with.

Now I need enough X values to represent a sine. Given that I need a 10kHz sine wave, I can use 40 X values to represent one period of my sine. So now my frequency is 400kHZ/40=10kHZ. My sine has a resolution, so to speak, of 40x40 pixels.

If I were to use, say, 80 values for X, the frequency of my sine would be only 5kHz, 400kHz/80.

In the following oscilloscope screenshot, I'm using prescaler 1, 16MHz clock, 40 COUNTERTOP and sending the value 1, a single pulse. The overall frequency is 400kHz (my scope is picking up a slightly different one, I think it's noise, I just hacked things together badly)

So far, so good: each pulse is at 16MHz, and I need 40 to represent a PWM value ("cycle")

Now I use a table with 40 values, forming a LUT for a sine (the one in my code above), and I see, as expected, a 10kHz sine wave. Badly filtered because I only had around the wrong RC values, but the overall frequency won't change, just how clean the sine looks

So now I ask again: what am I missing? How can I use more entries in the LUT without either reducing too much the vertical resolution or changing frequency? 40 and 40 is all I can do to make things work, and I don't understand how to program the nRF52840 any different. I could do 20 and 80, but it would be a worse compromise

If I needed a 1kHz sine wave, then, yes, I could use higher countertop and more table entries...

RE: Clarification on how to generate a 10kHz sine wave with PWM and DMA

hmolesworth — Wed, 22 Jun 2022 19:27:13 GMT

The PWM choices are dictated by the prescaler used, divide 16MHz by 1 , 2, 4, 8 etc;, This might be clearer:

// PWM frequency input with prescale /1: 16MHz
//
// COUNTERTOP   Steps  Resolution in % Output Frequency          Memory (bytes)
// ==========   =====  =============== ========================= ==============
//    1600       1600  1/1600 = .0625  16,000,000/1,600 =  10kHz 1600*2=3200
//      40         40  1/  40 = 2.5    16,000,000/   40 = 400kHz   40*2=  80


// PWM frequency input with prescale /8:  2MHz
//
// COUNTERTOP   Steps  Resolution in % Output Frequency          Memory (bytes)
// ==========   =====  =============== ========================= ==============
//     200        200  1/ 200 = 0.5     2,000,000/  200 =  10kHz  200*2= 400
//      40         40  1/  40 = 2.5     2,000,000/   40 =  50kHz   40*2=  80

RE: Clarification on how to generate a 10kHz sine wave with PWM and DMA

robca — Wed, 22 Jun 2022 17:19:31 GMT

[quote userid="65515" url="~/f/nordic-q-a/89209/clarification-on-how-to-generate-a-10khz-sine-wave-with-pwm-and-dma/373555"]Why only 40 steps, by the way? More steps and a faster net clock would give a better (cleaner) output unless you are very short of memory. 1600 steps (3200 bytes) is an option is it not ..[/quote]

Thanks for your answer, but either I misunderstand you or my understanding of the way a PWM works is wrong... or both 🙂

We start from a 16MHz clock. The first decision is how many steps of that 16MHz clock our PWM period uses. That is what Nordic calls counter top, and defines the resolution of the PWM. I landed on 40, to strike the best possible balance between sine points and resolution. So each PWM period has 40 steps, and each step is 2.5% duty cycle.

That results in a PWM frequency of 400kHz (16MHz/40). In order to generate a 10kHz sine, I can only use 40 points to define a single sine. I could use more points for the sine, but I would have fewer steps for the resolution. I chose 40 and 40 as a compromise between the competing requirements of the vertical and horizontal resolution. If the main clock were higher (some processors can use up to 256MHz clocks), I could increase both

What am I doing wrong?

I will try your Common-vs-waveform mode comment, I think I understand what you mean. But it would not change the resolution/frequency, which is the main concern now. I'm not sure that a 40 point.40 values sine would be anywhere near good enough to measure a phase shift from what I see on my scope, but maybe I can use a better output filter. I'm also not sure if the pin I used is properly configured, need to check

RE: Clarification on how to generate a 10kHz sine wave with PWM and DMA

hmolesworth — Wed, 22 Jun 2022 01:49:09 GMT

Since in PWM mode here COUNTERTOP is a fixed number, there is no need for waveform mode, instead use Common mode and a single pin connected. That requires a single 16-bit number for each step (instead of 4 numbers per step in waveform mode). Up/Down might give a better sine curve (instead of Up, but it doesn't matter other than maybe halving the memory requirement).

The CR filter is just that, a resistor feeding a capacitor to Gnd with the output at the CR junction. -3dB frequency set to (say) 10kHz gives 50% of available signal at the CR junction output. f=1/2pieCR, but very high values of R will be a problem depending on the impedance of the connected circuit being driven. Avoid polarised Tants, instead use ceramics for the capacitor. Maybe try 150R 100nF for 10kHz -3dB. Need to set PWM output pin to H0H1 drive levels, by the way, since driving a capacitive load

PDM mode might be a better option if there is too much distortion when you test this PWM; note PDM mode would require using PWM Waveform with a corresponding larger (more complex) table.

Why only 40 steps, by the way? More steps and a faster net clock would give a better (cleaner) output unless you are very short of memory. 1600 steps (3200 bytes) is an option is it not ..

Edit: I should add that the CR introduces a phase shift so the known zero-crossing position isn't; This can be allowed for, preferably with a ratiometric measurement using a fixed phase shift via (say) a calibrated CR network. The frequency step must be "smooth" between end-of-table and start-of-table to avoid a discontinuity in the measurement (in audio terms an annoying "click"). This is best handled by choosing a frequency very close to 10kHz which has an integral number of steps where the exact 10kHz sample might not otherwise be integral. Another reason for lots of steps