https://devzone.nordicsemi.com/f/nordic-q-a/89826/pwm-pin-tri-state-when-sequence-disabledWe have an application where we need the PWM pin state to revert to high impedance between bursts. It doesn&#39;t appear this behavior is capable by default. Is there a means to redefine the IO as an input between bursts?en-USTelligent Community 13Mon, 11 Jul 2022 12:04:33 GMThttps://devzone.nordicsemi.com/thread/376420?ContentTypeID=1Mon, 11 Jul 2022 12:04:33 GMT137ad170-7792-4731-bb38-c0d22fbe4515:a467a78e-d9f4-4d01-8ad5-be37e9049ca2Jared<p>Hi,</p> <p>After a SEQEND event you could try to configure the <a href="https://infocenter.nordicsemi.com/topic/ps_nrf5340/pwm.html?cp=3_0_0_6_22_4_30#register.PSEL.OUT">PSEL_OUT[n]</a>&nbsp;register to disconnected and set <a href="https://infocenter.nordicsemi.com/topic/ps_nrf5340/gpio.html?cp=3_0_0_6_12_4_10#register.PIN_CNF">PIN_CNF[n]</a> to input, with input buffer disconnected. That should make the pin high impedance.&nbsp;</p> <p>regards</p> <p>Jared&nbsp;</p><div style="clear:both;"></div>