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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/90081/gpio-latch-not-behaving-consistently</link><description>Hi, 
 I&amp;#39;m trying to get latch functionality working on two GPIO pins, but cannot seem get the latch register to behave consistently. 
 I have my GPIOs configured using a custom DTS binding and overlay, something like this: 
 
 
 In my main code, the flow</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 20 Jul 2022 08:26:27 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/90081/gpio-latch-not-behaving-consistently" /><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377792?ContentTypeID=1</link><pubDate>Wed, 20 Jul 2022 08:26:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dcf46b81-d90f-47f2-9067-a8688f36b6a5</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;unfortunately the driver owns all gpio ports once enabled. You can try to change that behavior by replace GPIO_COUNT with 1 in nrfx_gpiote.c and then this driver will not sniff port 1 gpio pins.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;#if defined(NRF_GPIO_LATCH_PRESENT)
static bool latch_pending_read_and_check(uint32_t * latch)
{
    nrf_gpio_latches_read_and_clear(0, GPIO_COUNT, latch);

    for (uint32_t port_idx = 0; port_idx &amp;lt; GPIO_COUNT; port_idx++)
    {
        if (latch[port_idx])
        {
            /* If any of the latch bits is still set, it means another edge has been captured
             * before or during the interrupt processing. Therefore event-processing loop
             * should be executed again. */
            return true;
        }
    }
    return false;
}&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377763?ContentTypeID=1</link><pubDate>Wed, 20 Jul 2022 06:09:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3bef2609-59ef-4082-93be-e9e50245bf43</guid><dc:creator>maxg</dc:creator><description>&lt;p&gt;In this particular application, I&amp;#39;d like to read the latch directly than to rely on any interrupts/handlers/callbacks from GPIOTE. If I want to do that, should I be OK if I sit it on its own separate port, e.g. my sensor on P0 and everything I want to read via latch on P1?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377760?ContentTypeID=1</link><pubDate>Wed, 20 Jul 2022 05:39:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c28bea5b-b07e-4c34-93d9-9bc91d4e91ba</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;Ok, glad that you wrote that you are using some other sensors on that port.&amp;nbsp; In that case you must have enabled nrfx_gpiote driver which then owns the gpio ports (with config NRF_GPIO_LATCH_PRESENT)&lt;/p&gt;
&lt;p&gt;.You should not try to figure out if the pin sense has been detected in the application logic but instead rely that the handler set in&amp;nbsp;nrfx_gpiote_input_configure will be called when the gpiote driver has processed the detected sense on your pin.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you want to handle the pin directly in your application then you need to disable NRFX_GPIOTE which then relinquishes control on the port.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377724?ContentTypeID=1</link><pubDate>Tue, 19 Jul 2022 18:22:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d99b53b2-de51-43a7-92d9-7ae96a072ca6</guid><dc:creator>maxg</dc:creator><description>&lt;p&gt;I&amp;#39;m sorry Susheel. I started moving code to a minimally reproducible example, and it looks like some other sensor reads are affecting how this latch reading code behaves.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;while (1) {
	// NRF_POWER-&amp;gt;SYSTEMOFF = 1;
	// LOG_INF(&amp;quot;Polling sensor...&amp;quot;);
	struct sensor_value pos_x, pos_y;
	sensor_sample_fetch(dev);
	sensor_channel_get(dev, SENSOR_CHAN_POS_DX, &amp;amp;pos_x);
	sensor_channel_get(dev, SENSOR_CHAN_POS_DY, &amp;amp;pos_y);

	if (old_pos_x.val1 != pos_x.val1 || old_pos_y.val1 != pos_y.val1) {
		LOG_INF(&amp;quot;x: %d, y: %d&amp;quot;, pos_x.val1, pos_y.val1);
	}

	// nrf_gpio_latches_read(0, 2, p_masks);


	NRF_P1-&amp;gt;LATCH = NRF_P1-&amp;gt;LATCH;
	(void)NRF_TIMER1-&amp;gt;EVENTS_COMPARE[0];
	pmask = NRF_P1-&amp;gt;LATCH;

	// uint32_t pmask = p_masks[1];

	// if ((pmask &amp;amp; (1U &amp;lt;&amp;lt; 13U)) || (pmask &amp;amp; (1U &amp;lt;&amp;lt; 12U))){
	if (pmask != 0){
		LOG_INF(&amp;quot;Event: %d&amp;quot;, pmask);
		pmask_old = pmask;
	}


	old_pos_x = pos_x;
	old_pos_y = pos_y;

	//k_sleep(K_MSEC(10));
}&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;I&amp;#39;m using the PMW3360 driver (&lt;a id="" href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/drivers/pmw3360.html"&gt;https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/drivers/pmw3360.html&lt;/a&gt;) and am not immediately sure why this causes the latch to not behave as expected. I haven&amp;#39;t had a chance to go through the code for the driver yet.&lt;/p&gt;
&lt;p&gt;Here&amp;#39;s my full device tree:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
    spi1_default_alt: spi1_default_alt {
        group1 {
            psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 2)&amp;gt;,
                    &amp;lt;NRF_PSEL(SPIM_MISO, 0, 26)&amp;gt;,
                    &amp;lt;NRF_PSEL(SPIM_MOSI, 0, 27)&amp;gt;;
        };
    };

    spi1_sleep_alt: spi1_sleep_alt {
        group1 {
            psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 2)&amp;gt;,
                    &amp;lt;NRF_PSEL(SPIM_MISO, 0, 26)&amp;gt;,
                    &amp;lt;NRF_PSEL(SPIM_MOSI, 0, 27)&amp;gt;;
            // low-power-enable;
        };
    };
};

&amp;amp;spi1 {
    compatible = &amp;quot;nordic,nrf-spim&amp;quot;;
    status = &amp;quot;okay&amp;quot;;
    pinctrl-0 = &amp;lt;&amp;amp;spi1_default_alt&amp;gt;;
    pinctrl-1 = &amp;lt;&amp;amp;spi1_sleep_alt&amp;gt;;
    pinctrl-names = &amp;quot;default&amp;quot;, &amp;quot;sleep&amp;quot;;
    cs-gpios = &amp;lt;&amp;amp;gpio1 14 0&amp;gt;;

    pmw3360@0 {
            compatible = &amp;quot;pixart,pmw3360&amp;quot;;
            reg = &amp;lt;0&amp;gt;;
            irq-gpios = &amp;lt;&amp;amp;gpio1 15 0&amp;gt;;
            spi-max-frequency = &amp;lt;2000000&amp;gt;;
            label = &amp;quot;PMW3360&amp;quot;;
    };
};

/ {
    mbuttons { 
        compatible = &amp;quot;any,spdt-switch&amp;quot;;
        rmb: switch_0 { 
            ncgpios = &amp;lt;&amp;amp;gpio1 12 0&amp;gt;;
            nogpios = &amp;lt;&amp;amp;gpio1 13 0&amp;gt;;
        };
    };
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;Is it likely to be the case that, since I&amp;#39;m using GPIOs on port 1 for IRQ (sensor motion) &amp;amp; CS for the sensor, the driver is (spuriously?) handling the latch behavior for the entire port?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If I want to use the latch functionality in the way that I&amp;#39;m attempting to now, should I keep those pins I want to operate on a latch with on a totally separate port, e.g. motion sensor and other peripherals on port 0, GPIO inputs with latch on port 1? Or should there be a way I can do this on the same port while not messing with the functionality?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377720?ContentTypeID=1</link><pubDate>Tue, 19 Jul 2022 18:05:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e331a2c0-39d4-4317-9d80-0a928c29adf5</guid><dc:creator>maxg</dc:creator><description>&lt;p&gt;When I add this, it seems to run through my main every single time I actuate the switch, without fail.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377607?ContentTypeID=1</link><pubDate>Tue, 19 Jul 2022 11:54:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:124662d0-8c77-4d87-9879-3a6f5e3ab0e7</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;That is strange,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Can you add&amp;nbsp;&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;NRF_POWER-&amp;gt;SYSTEMOFF = 1.&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;before&amp;nbsp;nrf_gpio_latches_read_and_clear. Just to check if the chip power state affects the detection of the sense pins? Something like below.&lt;/p&gt;
&lt;p&gt;while(1) {&lt;/p&gt;
&lt;p&gt;NRF_POWER-&amp;gt;SYSTEMOFF = 1.&lt;br /&gt; // I&amp;#39;ve also tried this one, with p_masks etc&lt;br /&gt; // pmask = nrf_gpio_latches_read_and_clear(0, 2, p_masks);&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377471?ContentTypeID=1</link><pubDate>Mon, 18 Jul 2022 19:38:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:20d9f738-61bb-40a9-8668-f60ea89678c2</guid><dc:creator>maxg</dc:creator><description>&lt;p&gt;This log statement&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;LOG_INF(&amp;quot;Pin 12: %d&amp;quot;, NRF_P1-&amp;gt;PIN_CNF[12]);
LOG_INF(&amp;quot;Pin 13: %d&amp;quot;, NRF_P1-&amp;gt;PIN_CNF[13]);&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Yields:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;I: Pin 12: 131084
I: Pin 13: 196620&lt;/pre&gt;&lt;/p&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;131084 = 0b100000000000001100&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;196620 = 0b110000000000001100&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;Per &lt;a href="https://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52832.ps.v1.1%2Fgpio.html"&gt;https://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52832.ps.v1.1%2Fgpio.html&lt;/a&gt;,&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;Pin 13 seems to be configured correctly for sense and pin 12 isn&amp;#39;t (!). I&amp;#39;m not sure why. Forcing the config via&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;&lt;pre class="ui-code" data-mode="text"&gt;NRF_P1-&amp;gt;PIN_CNF[12] |= NRF_GPIO_PIN_SENSE_LOW &amp;lt;&amp;lt; GPIO_PIN_CNF_SENSE_Pos;
NRF_P1-&amp;gt;PIN_CNF[13] |= NRF_GPIO_PIN_SENSE_LOW &amp;lt;&amp;lt; GPIO_PIN_CNF_SENSE_Pos;&lt;/pre&gt;&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;Makes the P1.12 value match P1.13&amp;#39;s PIN_CNF, but doesn&amp;#39;t seem to yield a different behavior.&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;&lt;/div&gt;
&lt;div class="dDoNo vrBOv vk_bk"&gt;I think that connect and all the other parameters for input seem to be set correctly. It&amp;#39;s very possible I&amp;#39;m missing something here.&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO Latch not behaving consistently</title><link>https://devzone.nordicsemi.com/thread/377468?ContentTypeID=1</link><pubDate>Mon, 18 Jul 2022 19:12:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0acbb9a9-f2aa-4c88-9dc6-4bc3dad2ed0e</guid><dc:creator>Susheel Nuguru</dc:creator><description>&lt;p&gt;There is nothing obviously wrong that points out to me.&lt;/p&gt;
&lt;p&gt;Can you check if&amp;nbsp;nrf_gpio_cfg_sense_input has actually configured the GPIO config register to enable the sense configuration on those pins? The reason I am asking to check is to see if the&amp;nbsp;NRF_DT_GPIOS_TO_PSEL is being decoded correctly from your device tree config.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>