<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to allocate shared SRAM on the nrf5340</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/90215/how-to-allocate-shared-sram-on-the-nrf5340</link><description>I would like to use a portion of the shared SRAM (address range 0x20070000-0x2007FFFF) to transfer some raw data between the network and application cores. My system is also using the rpmsg service to transfer messages between cores (less time critical</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 14 Sep 2022 07:01:38 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/90215/how-to-allocate-shared-sram-on-the-nrf5340" /><item><title>RE: How to allocate shared SRAM on the nrf5340</title><link>https://devzone.nordicsemi.com/thread/386092?ContentTypeID=1</link><pubDate>Wed, 14 Sep 2022 07:01:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:922831cf-da16-4cd6-b955-6cbb8cc153ee</guid><dc:creator>Simon</dc:creator><description>&lt;p&gt;Thanks for sharing the solution Kevin!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to allocate shared SRAM on the nrf5340</title><link>https://devzone.nordicsemi.com/thread/385816?ContentTypeID=1</link><pubDate>Mon, 12 Sep 2022 20:45:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fd4f5064-1f91-47c6-8923-1c2e490a0891</guid><dc:creator>Kevin Doss</dc:creator><description>&lt;p&gt;For others who may be interested in doing something similar....&lt;/p&gt;
&lt;p&gt;I was able to allocate a segment of shared SRAM in the 0x20070000 - 0x2007FFFF region that was separate from rpmsg service by modifying the existing devicetree:&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp;&lt;/span&gt;&lt;span&gt;reserved-memory&lt;/span&gt;&lt;span&gt; {&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;#address-cells&lt;/span&gt;&lt;span&gt; = &amp;lt; &lt;/span&gt;&lt;span&gt;0x1&lt;/span&gt;&lt;span&gt; &amp;gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;#size-cells&lt;/span&gt;&lt;span&gt; = &amp;lt; &lt;/span&gt;&lt;span&gt;0x1&lt;/span&gt;&lt;span&gt; &amp;gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;ranges&lt;/span&gt;&lt;span&gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;sram0_shared:&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;memory&lt;/span&gt;&lt;span&gt;@&lt;/span&gt;&lt;span&gt;20070000&lt;/span&gt;&lt;span&gt; {&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/span&gt;&lt;span&gt;reg&lt;/span&gt;&lt;span&gt; = &amp;lt; &lt;/span&gt;&lt;span&gt;0x20070000&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;0x10000&lt;/span&gt;&lt;span&gt; &amp;gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; };&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp;};&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;with this overlay:&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;&amp;nbsp; reserved-memory {&lt;br /&gt;&amp;nbsp; &amp;nbsp; /delete-node/ memory@20070000;&lt;br /&gt;&amp;nbsp; &amp;nbsp; sram0_shared: memory@20070000 {&lt;br /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;0x20070000 0xF000&amp;gt;;&lt;br /&gt;&amp;nbsp; &amp;nbsp; };&lt;br /&gt;&amp;nbsp; &amp;nbsp; sram_my_data: memory@2007F000 {&lt;br /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;0x2007F000 0x1000&amp;gt;;&lt;br /&gt;&amp;nbsp; &amp;nbsp; };&lt;br /&gt;&amp;nbsp; };&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;&amp;nbsp; aliases {&lt;/div&gt;
&lt;div&gt;&amp;nbsp; &amp;nbsp; srammydata = &amp;amp;sram_my_data;&lt;/div&gt;
&lt;div&gt;&amp;nbsp; };&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;I can then initialize a pointer to a data structure at that location like this:&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;my_data_t&amp;nbsp; *pMyData;&lt;/div&gt;
&lt;div&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;pMyData&amp;nbsp;&lt;/span&gt;&lt;span&gt;= (my_data&lt;/span&gt;&lt;span&gt;_t&lt;/span&gt;&lt;span&gt;*)&lt;/span&gt;&lt;span&gt;DT_REG_ADDR&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(srammydata));&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;Hope this is helpful,&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;Kevin&lt;/span&gt;&lt;/div&gt;
&lt;/div&gt;
&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to allocate shared SRAM on the nrf5340</title><link>https://devzone.nordicsemi.com/thread/379080?ContentTypeID=1</link><pubDate>Thu, 28 Jul 2022 09:52:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:139b1fd5-4051-4d14-bd50-e21e3b853ec7</guid><dc:creator>Simon</dc:creator><description>[quote user=""] Is there some way to either allocate memory from this region or discover what address range(s) the rpmsg service is using so I don&amp;#39;t have memory conflicts with the rpmsg service?[/quote]
&lt;p&gt;Sorry for the late response. During July, a huge part of the support team are taking vacation and you can expect a slower repsonse.&lt;/p&gt;
&lt;p&gt;I think you should be able to&amp;nbsp;allocate memory using a pm_static.yml file. I built the peripheral_uart sample with the nRF5340 DK, then ran&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;ninja partition_manager_report&lt;/code&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;from the build folder and got the following response:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;  flash_primary (0x100000 - 1024kB): 
+------------------------------------------+
| 0x0: app (0xfe000 - 1016kB)              |
| 0xfe000: settings_storage (0x2000 - 8kB) |
+------------------------------------------+

  otp (0x2fc - 764B): 
+------------------------------+
| 0xff8100: otp (0x2fc - 764B) |
+------------------------------+

  sram_primary (0x80000 - 512kB): 
+-----------------------------------------------+
| 0x20000000: sram_primary (0x70000 - 448kB)    |
| 0x20070000: rpmsg_nrf53_sram (0x10000 - 64kB) |
+-----------------------------------------------+

 CPUNET flash_primary (0x40000 - 256kB): 
+----------------------------------------+
+---0x1000000: app (0x40000 - 256kB)-----+
+----------------------------------------+

 CPUNET sram_primary (0x10000 - 64kB):
+------------------------------+

  sram_primary (0x80000 - 512kB):
+-----------------------------------------------+
| 0x20000000: sram_primary (0x70000 - 448kB)    |
| 0x20070000: rpmsg_nrf53_sram (0x10000 - 64kB) |
+-----------------------------------------------+

 CPUNET flash_primary (0x40000 - 256kB):
+----------------------------------------+
+---0x1000000: app (0x40000 - 256kB)-----+
| 0x1000000: hci_rpmsg (0x40000 - 256kB) |
+----------------------------------------+

 CPUNET sram_primary (0x10000 - 64kB):
+-------------------------------------------+
| 0x21000000: sram_primary (0x10000 - 64kB) |
+-------------------------------------------+&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;As you can see, the rpmsg occupies 0x10000 bytes at address 0x20070000&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to allocate shared SRAM on the nrf5340</title><link>https://devzone.nordicsemi.com/thread/378154?ContentTypeID=1</link><pubDate>Thu, 21 Jul 2022 14:52:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c198f56f-a643-4f52-aa02-44170cbd93a8</guid><dc:creator>Kevin Doss</dc:creator><description>&lt;p&gt;This case provides resources for understanding how to use the various messaging services that abstract the IPC interface. I&amp;#39;m already using the rpmsg service for message passing between cores. This works great for exchanging messages that aren&amp;#39;t extremely time critical. My application has data that is very time critical and I&amp;#39;m looking for ways to reduce the latency of passing this data across IPC to the bare minimum. What I&amp;#39;d like to do is simply allocate a small data structure in the Shared SRAM space and an IPC channel. On the receiving end I will enable a receive interrupt on the IPC channel and process the data directly in the interrupt handler.&lt;/p&gt;
&lt;p&gt;The gist of my question is how can I allocate a small amount of memory (&amp;lt;100 bytes) in Shared SRAM and be sure that the memory is not being used by the rpmsg service?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to allocate shared SRAM on the nrf5340</title><link>https://devzone.nordicsemi.com/thread/378083?ContentTypeID=1</link><pubDate>Thu, 21 Jul 2022 12:07:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8d0b8ed9-1d70-43cb-97ad-0461012bf01b</guid><dc:creator>Simon</dc:creator><description>&lt;p&gt;Take a look at this DevZone case and the resources provided:&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/89127/communication-between-appcore-and-netcore"&gt;Communication between AppCore and NetCore&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;If that didn&amp;#39;t help answering your questions, please let me know and I will take a deeper look at it.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>