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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF52832</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/90324/nrf52832</link><description>Hi Nordic engineer About the I2C SDA signal, when CLK voltage change then the SDA will occur skin needling，could you please helo explain it, I check the PCB latout, the I2C signals line width and SDA/SCL distance is 0.1mm, Its caused by the crosstalk</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 05 Aug 2022 07:57:10 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/90324/nrf52832" /><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/380293?ContentTypeID=1</link><pubDate>Fri, 05 Aug 2022 07:57:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0f95e116-029e-46cd-a7b9-82a239778ac7</guid><dc:creator>Bendik Heiskel</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Sorry for the delay.&lt;/p&gt;
&lt;p&gt;Are you referring to the GPIO drive strength?&lt;/p&gt;
&lt;p&gt;The GPIO drive strength affects the maximum current the SDA and SCL pins can source/sink. If you are using a small pull-up resistor increasing the drive strength could help decrease the data drop.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Bendik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/379431?ContentTypeID=1</link><pubDate>Mon, 01 Aug 2022 06:25:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7af6b03c-b162-4e35-b0dd-ed54e927a08a</guid><dc:creator>Ysen</dc:creator><description>&lt;p&gt;Hi&amp;nbsp;&lt;/p&gt;
&lt;p&gt;One more thing, the data drop will decreas after increase the GPIO driver,Could you share more details of this? I&amp;#39;m not clear with it, Thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/379283?ContentTypeID=1</link><pubDate>Fri, 29 Jul 2022 10:24:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:464c5c61-88b0-453e-b844-29caa14730d9</guid><dc:creator>Bendik Heiskel</dc:creator><description>&lt;p&gt;I don&amp;#39;t really have a minimum distance, as the voltage of the crosstalk spike is roughly directly proportional to the distance between the traces. Meaning the a doubling of width between the traces will approximately half the voltage spike.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/379099?ContentTypeID=1</link><pubDate>Thu, 28 Jul 2022 11:10:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:419042d1-bf90-4e6c-8c33-ca5693f48617</guid><dc:creator>Ysen</dc:creator><description>&lt;p&gt;HI&lt;/p&gt;
&lt;p&gt;what about the disstance should be&amp;nbsp;compatible？ 1.5 times&amp;nbsp; line width?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/378925?ContentTypeID=1</link><pubDate>Wed, 27 Jul 2022 13:07:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5a1a91e1-6f21-4e40-aab7-1fae254cd043</guid><dc:creator>Bendik Heiskel</dc:creator><description>[quote user="Ysen"]About the SDA/SCL width and distance, we set all 0.1mm, for this design, is there any risk?[/quote]
&lt;p&gt;As long as the spikes on the SDA line don&amp;#39;t go under 0.7xVDD then it should not be a problem.&lt;/p&gt;
[quote user="Ysen"]What about your advice of I2C layout?[/quote]
&lt;p&gt;To reduce the capacitive coupling between the SDA and SCL lines I recommend increasing the distance between the traces.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/378799?ContentTypeID=1</link><pubDate>Wed, 27 Jul 2022 02:24:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:216410a6-9d88-4610-abf1-6aaa4c234887</guid><dc:creator>Ysen</dc:creator><description>&lt;p&gt;Hi&amp;nbsp;&lt;/p&gt;
&lt;p&gt;About the SDA/SCL width and distance, we set all 0.1mm, for this design, is there any risk? What about your advice of I2C layout? Thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/378755?ContentTypeID=1</link><pubDate>Tue, 26 Jul 2022 14:35:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b511262-348c-4836-a8e3-9659f1738e5e</guid><dc:creator>Bendik Heiskel</dc:creator><description>&lt;p&gt;Hi again,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Based on the provided plot this looks to be caused by capacitive coupling between the SDA and CLK lines on the PCB.&lt;/p&gt;
&lt;p&gt;But the spikes does not look large enough to cause a problem for the I2C communication.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Bendik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/378644?ContentTypeID=1</link><pubDate>Tue, 26 Jul 2022 08:15:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9d4fcb2a-4d8b-4391-b456-d7abd4048e97</guid><dc:creator>Ysen</dc:creator><description>&lt;p&gt;Hi&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Got it,Please give the explaintion and any reason ASAP.Thanks!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF52832</title><link>https://devzone.nordicsemi.com/thread/378559?ContentTypeID=1</link><pubDate>Mon, 25 Jul 2022 13:54:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0c356319-5956-4e94-ad7c-35c8563c9247</guid><dc:creator>Bendik Heiskel</dc:creator><description>&lt;p&gt;Hi ,&lt;br /&gt;&lt;br /&gt;We are currently in holiday season in Norway so staffing is low, and response time will be a bit slower then usual, sorry for the inconvenience.&lt;br /&gt;&lt;br /&gt;I will update you as soon as I can on your request. &lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Bendik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>