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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/90366/ncs-central-uart-sample</link><description>Hi, 
 
 I had previously posted this as an issue and self-resolved but it has re-occurred so I am re-opening the issue. 
 The central_uart sample hardfaults when bt_enable(NULL) is entered. I can use the debugger and step over the first couple lines but</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 22 Feb 2024 10:48:57 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/90366/ncs-central-uart-sample" /><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/470213?ContentTypeID=1</link><pubDate>Thu, 22 Feb 2024 10:48:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2e02d49d-0b05-4908-8d14-3bf396170907</guid><dc:creator>Sourabh_DevZone</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I was also getting same error with NCS-v2.5.2, It looks like there may be a stack overflow in the main thread. Please try to double the stack size by adding &amp;quot;CONFIG_MAIN_STACK_SIZE=2048&amp;quot; to the prj.conf file and see if you still get the same error after. &lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Sourabh&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/404787?ContentTypeID=1</link><pubDate>Fri, 13 Jan 2023 12:22:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:553fdb75-539f-4e06-a3cb-728283a1da98</guid><dc:creator>dejans</dc:creator><description>&lt;p&gt;Hi,&lt;br /&gt;&lt;br /&gt;Thank you for your input and for letting us know that the issue is no more present.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Dejan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/404633?ContentTypeID=1</link><pubDate>Thu, 12 Jan 2023 16:04:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:be11b6ec-d4dc-4249-b149-93e4ae4158b5</guid><dc:creator>Anthony W</dc:creator><description>&lt;p&gt;I want to point out this issue is still occurring in the sample. I&amp;#39;ve used an nRF52-DK as well as a BMD-350 EVK, same issue in both, whether debugging or not. If I step through the code, it fails at bt_enable with a HardFault:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;Level,Function,Stack Frame,Source,PC,Return Address,Stack Used
0,&amp;lt;HardFault Exception&amp;gt;,32 @ 0x20005188,fault_s.S:80,0x00019190,[0x200051A0]: 0x11B35B2A,32
0,Top of stack - return address out of range: 0x11B35B2A,,,,,&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Edit: I upgraded NCS to 2.2.0 and this seems resolved. So maybe a non-issue now.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/379035?ContentTypeID=1</link><pubDate>Thu, 28 Jul 2022 07:13:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:878d0fb8-d5b6-4a33-a461-db9badb7f15f</guid><dc:creator>dejans</dc:creator><description>&lt;p&gt;Hi,&lt;br /&gt;&lt;br /&gt;I am glad I was able to assist you.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Dejan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/378977?ContentTypeID=1</link><pubDate>Wed, 27 Jul 2022 16:20:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:64f7a70b-f41f-4906-87a8-628110193ec5</guid><dc:creator>pfishburn</dc:creator><description>&lt;p&gt;Thank you for investigating. I will follow up if I find any more information on why the sample is being finicky on my boards.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/378841?ContentTypeID=1</link><pubDate>Wed, 27 Jul 2022 08:29:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:06d160cd-0b13-4e9b-b85a-f4ab9cd371ea</guid><dc:creator>dejans</dc:creator><description>&lt;p&gt;Hi,&lt;br /&gt;&lt;br /&gt;I have tested the sample. I have not encountered continuous rebooting as you described it. I have seen only one reboot while &amp;quot;stepping over&amp;quot; using debugger and this was when the hard fault appeared. In addition, I have not observed any difference between just erasing, and erasing and flashing the board.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Dejan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/378785?ContentTypeID=1</link><pubDate>Tue, 26 Jul 2022 20:39:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:49de00b9-0b28-4287-86e1-82c9201d4843</guid><dc:creator>pfishburn</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/dejans"&gt;dejans&lt;/a&gt;&amp;nbsp;Any idea why the sample reboots continually unless it is loaded after a previous SDK version of the same example?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/378766?ContentTypeID=1</link><pubDate>Tue, 26 Jul 2022 15:26:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1cbebf99-b1ad-4596-9241-9583d3c8fe70</guid><dc:creator>pfishburn</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Yes, I am aware debugging can sometimes cause a hardfault by slowly stepping through the code. The issue is still present when the board is erased, flashed and rebooted. This is noticed from the log output displaying&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;*** Booting Zephyr OS build v3.0.99-ncs1 ***&lt;/span&gt;&lt;br /&gt;&lt;span&gt;*** Booting Zephyr OS build v3.0.99-ncs1 ***&lt;/span&gt;&lt;br /&gt;&lt;span&gt;*** Booting Zephyr OS build v3.0.99-ncs1 ***&lt;/span&gt;&lt;br /&gt;&lt;span&gt;*** Booting Zephyr OS build v3.0.99-ncs1 ***&lt;/span&gt;&lt;br /&gt;&lt;span&gt;*** Booting Zephyr OS build v3.0.99-ncs1 ***&lt;/span&gt;&lt;br /&gt;&lt;span&gt;*** Booting Zephyr OS build v3.0.99-ncs1 ***&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;...&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;The initial boot log is repeatedly shown since the board is repeatedly hitting a hardfault and rebooting.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/378761?ContentTypeID=1</link><pubDate>Tue, 26 Jul 2022 14:48:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cfcc4f57-b827-4180-af96-c96bbb67a2fe</guid><dc:creator>dejans</dc:creator><description>&lt;p&gt;Hi,&lt;br /&gt;&lt;br /&gt;Hard fault can appear at some point when you debug Bluetooth samples due to broken timing requirements of the&amp;nbsp;SoftDevice Controller. In order to avoid breaking these requirements, you should consider logging instead of debugging.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Dejan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NCS: Central UART Sample</title><link>https://devzone.nordicsemi.com/thread/378603?ContentTypeID=1</link><pubDate>Tue, 26 Jul 2022 00:54:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ae9c2bb3-8807-4e6c-8924-d27e9fef51f2</guid><dc:creator>pfishburn</dc:creator><description>&lt;p&gt;Here&amp;#39;s the most perplexing part of all and why I thought it was fixed initially:&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;When the dk52 board is erased and loaded with the ncs v2.0.0 version of central_uart sample, there is a repeated hardfault and reboot on bt_enable(). If the board is erased and loaded with the ncs v1.7.0 version of central_uart then the sample runs successfully.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;However, if the ncs v2.0.0 central_uart is flashed (NOT erased and flashed) back to the board after running the v1.7.0 central_uart then the&amp;nbsp;v2.0.0 central_uart runs successfully.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Erasing and flashing the v2.0.0 central_uart re-causes the board to hardfault reboot as described in the original post.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>