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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/90563/config-p1-00-and-p1-01-as-uart0-rx-and-tx</link><description>Hi, 
 We are developing our product using nrf5340. Currently, we are using NCS v1.9.1 for development. We need to give UART to test our Board for Certain conditions by using a TTL converter. We have given the P1.00 as Rx and P1.01 as TX. I have tried</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 16 Sep 2022 11:24:57 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/90563/config-p1-00-and-p1-01-as-uart0-rx-and-tx" /><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/386609?ContentTypeID=1</link><pubDate>Fri, 16 Sep 2022 11:24:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1b41df3f-cba7-4453-8d27-0443ef122c21</guid><dc:creator>Rory Morrison</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I&amp;#39;m trying to use P1.00 on SDK 2.1.0 (having just updated from 1.8.0) and I still don&amp;#39;t seem to be able to use the pin after following your fix here.&lt;/p&gt;
&lt;p&gt;I&amp;#39;ve&amp;nbsp;disabled&amp;nbsp;gpio_fwd in the app overlay, and added the Child Image config and overlay. Is there anything else I need to do, or maybe changes to the latest SDK that change the way to do this?&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;
&lt;p&gt;Rory&lt;/p&gt;
&lt;p&gt;EDIT:&lt;/p&gt;
&lt;p&gt;Turns out the fix above does work, I just had other problems introduced by&amp;nbsp;updating to&amp;nbsp;the new SDK. Once I tracked down all the changes I had P1.00 working fine.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380737?ContentTypeID=1</link><pubDate>Tue, 09 Aug 2022 07:16:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4ef6facc-7fe2-44a8-92c7-37b05c71dc46</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi Oivind,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;Yes, it is working. Thank you so much&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380369?ContentTypeID=1</link><pubDate>Fri, 05 Aug 2022 12:12:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b5ac0043-a389-41f6-8aff-d997a7a6b4c2</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Yes, it seems to work completely fine on my board. The nrf53 sets up 3 COM ports, the first one is normally used by the app core, and the second by the network core. When I flash your application, the app core uses the second COM port, and there is no activity on the first COM port, as expected. When I comment out the pin assignments in the app core overlay, it uses the first COM port, also as expected.&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t see any issues on the board side, so you might want to double check your TTL converter/terminal setup. For example that you are looking at the correct port?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380337?ContentTypeID=1</link><pubDate>Fri, 05 Aug 2022 10:38:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a7840c2f-dced-43f0-8ed6-848bbd09092f</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi oivind,&lt;/p&gt;
&lt;p&gt;did you verify?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380152?ContentTypeID=1</link><pubDate>Thu, 04 Aug 2022 13:32:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0760bfd5-f979-4f2f-bad9-2e600ad023c6</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;kindly, check the below attachment.&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/peripheral_5F00_uart_5F00_test.zip"&gt;devzone.nordicsemi.com/.../peripheral_5F00_uart_5F00_test.zip&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380103?ContentTypeID=1</link><pubDate>Thu, 04 Aug 2022 11:40:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3f9e8779-c318-4560-9411-23e642c34295</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Could you zip and attach your project, including the build folder?&lt;/p&gt;
&lt;p&gt;I can make this case private if that is necessary for you to attach your project.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380074?ContentTypeID=1</link><pubDate>Thu, 04 Aug 2022 10:01:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:aaefdec4-1bc3-4572-b375-000e8d3f16e3</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi oivind.&lt;/p&gt;
&lt;p&gt;are you there?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/380004?ContentTypeID=1</link><pubDate>Thu, 04 Aug 2022 02:03:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:caf4cb24-d963-4750-ba13-050c75e9d649</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi oivind,&lt;/p&gt;
&lt;p&gt;I am waiting for your response.&lt;/p&gt;
&lt;p&gt;Thanks &amp;amp; regards&lt;/p&gt;
&lt;p&gt;Navin&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379758?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 15:04:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:661ddcda-9120-4afc-8c56-eeec6d059dfd</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi oivind,&lt;/p&gt;
&lt;p&gt;I have made the changes as per your guidance. Still i am not getting output in terminal.&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Navin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379755?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 14:43:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:29fc7ded-7399-4071-8403-c86fa2e7059d</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;This has to be done in the SDK.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379734?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 13:35:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e7fe321a-af6e-42b2-b97e-62f9e4e699b7</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi oivind,&lt;/p&gt;
&lt;p&gt;I need to do this in my project itself or i need to do in nrf connect sdk&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Navin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379724?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 13:14:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:390693d9-265a-41f3-8d66-4077a0425839</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Sorry, forgot that you are on v1.9.1.&lt;/p&gt;
&lt;p&gt;Instead of adding the gpio_fwd node, try opening zephyr/boards/arm/nrf5340dk_nrf5340/nrf5340_cpunet_reset.c&lt;br /&gt;and commenting out these lines:&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/4087.cpunet_5F00_reset.png" /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379713?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 12:20:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5b643612-9717-408f-86b7-494283307069</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi Oivind,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;After implementing the points which you shared. I have got the below error&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1659442794614v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Kindly, check and let me know the correction.&lt;/p&gt;
&lt;p&gt;Thanks &amp;amp; Regards&lt;/p&gt;
&lt;p&gt;Navin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379678?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 10:37:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8665ea37-5ede-4119-8752-1f20ab33f200</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Add this to your overlay file for the app core:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;gpio_fwd {
    status = &amp;quot;disabled&amp;quot;;
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;For the network core, add a folder called &amp;quot;child_image&amp;quot; to your project, at the same location as your CMakeLists.txt file.&lt;br /&gt;In this folder add a file named &amp;quot;hci_rpmsg.overlay&amp;quot; and a file named &amp;quot;hci_rpmsg.conf&amp;quot;. These files will be automatically applied to the network core child image.&lt;/p&gt;
&lt;p&gt;In hci_rpmsg.overlay:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;uart0 {
	status = &amp;quot;disabled&amp;quot;;
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;In hci_rpmsg.conf:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;CONFIG_SERIAL=n
CONFIG_UART_CONSOLE=n&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;This will disable the uart0 on the network core, and stop the app core from forwarding the pins.&lt;/p&gt;
&lt;p&gt;Uart logging from the network core will be disabled.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379675?ContentTypeID=1</link><pubDate>Tue, 02 Aug 2022 10:29:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:688527da-b795-4c45-9220-c6217b9182e8</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;HI oivind,&lt;/p&gt;
&lt;p&gt;We are waiting for your response regarding the further move.&lt;/p&gt;
&lt;p&gt;Thanks &amp;amp; Regards,&lt;/p&gt;
&lt;p&gt;Navin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379532?ContentTypeID=1</link><pubDate>Mon, 01 Aug 2022 12:26:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:25143353-cd32-4b0f-8136-8a2a42c59f09</guid><dc:creator>Mr.NCK</dc:creator><description>&lt;p&gt;Hi Oivind,&lt;/p&gt;
[quote userid="81283" url="~/f/nordic-q-a/90563/config-p1-00-and-p1-01-as-uart0-rx-and-tx/379517"]but I can help you with disabling the uart on the network core and the gpio forwarding if you need to use those pins.[/quote]
&lt;p&gt;I need this help. and also I need to know &amp;quot;changing these pins will not affect the BLE function or other functions right &amp;quot;&lt;/p&gt;
&lt;p&gt;Thanks &amp;amp; Regards&lt;/p&gt;
&lt;p&gt;Navin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Config P1.00 and P1.01 as UART0 RX and TX</title><link>https://devzone.nordicsemi.com/thread/379517?ContentTypeID=1</link><pubDate>Mon, 01 Aug 2022 11:46:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e8baa3f5-1e6f-4261-b6b5-ed5a281b3b19</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;P1.00 and P1.01 are by default forwarded to the network core for its uart, along with P0.10 and P0.11.&lt;/p&gt;
&lt;p&gt;I recommend using other pins if possible, but I can help you with disabling the uart on the network core and the gpio forwarding if you need to use those pins.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>