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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>XIP problems with a custom board running nrf5340</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/91773/xip-problems-with-a-custom-board-running-nrf5340</link><description>Hi, 
 I&amp;#39;m trying to use XIP on our custom board running a nrf5340 with a different Flash memory than the one on the nrf5340-devkit. 
 The XIP worked on nrf5340dk, but now it&amp;#39;s not working on the custom board. We are using a different Flash memory, W25Q64JW</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 09 Sep 2022 09:34:15 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/91773/xip-problems-with-a-custom-board-running-nrf5340" /><item><title>RE: XIP problems with a custom board running nrf5340</title><link>https://devzone.nordicsemi.com/thread/385469?ContentTypeID=1</link><pubDate>Fri, 09 Sep 2022 09:34:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:09f11e29-9df2-400e-b70e-41cb37975479</guid><dc:creator>Pelle</dc:creator><description>&lt;p&gt;PROBLEM SOLVED&lt;/p&gt;
&lt;p&gt;Added a custom QSPI settings file with these properties and used it with the command:&lt;br /&gt;&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;nrfjprog --qspiini ../app/QspiSettings.ini --coprocessor CP_APPLICATION --sectorerase --qspisectorerase --program zephyr.hex --verify
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;The added part above is &amp;quot;--qspiini ../app/QspiSettings.ini&amp;quot; which adds a custom settings file for the correct flash device.&lt;/p&gt;
&lt;p&gt;And this is how the file looks like:&lt;br /&gt;(I changed the following parameters to correspond to W25Q64 flash memory):&lt;/p&gt;
&lt;p&gt;MemSize = 8000000 (instead of 800000)&lt;br /&gt;WriteMode = PP4O (instead of PP4IO which is not supported by W25Q64)&lt;br /&gt;SckDelay = 0xA (instead of 0x80)&lt;br /&gt;&lt;br /&gt;And changed all pins to correct values.&lt;/p&gt;
&lt;p&gt;All of those parameters above was found in the data sheet of W25Q64 flash.&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;; nrfjprog.exe configuration file.

[DEFAULT_CONFIGURATION]
; Define the capacity of the flash memory device in bytes. Set to 0 if no external memory device is present in your board.
MemSize = 8000000

; Define the desired ReadMode. Valid options are FASTREAD, READ2O, READ2IO, READ4O and READ4IO
ReadMode = READ4IO

; Define the desired WriteMode. Valid options are PP, PP2O, PP4O and PP4IO
WriteMode = PP4O

; Define the desired AddressMode. Valid options are BIT24 and BIT32
AddressMode = BIT24

; Define the desired Frequency. Valid options are M2, M4, M8, M16 and M32
Frequency = M16

; Define the desired SPI mode. Valid options are MODE0 and MODE3
SpiMode = MODE0

; Define the desired SckDelay. Valid options are in the range 0 to 255
SckDelay = 0xA

; Define the desired IO level for DIO2 and DIO3 during a custom instruction. Valid options are LEVEL_HIGH and LEVEL_LOW
CustomInstructionIO2Level = LEVEL_LOW
CustomInstructionIO3Level = LEVEL_HIGH

CSNPin = 18
CSNPort = 0
SCKPin = 17
SCKPort = 0
DIO0Pin = 13
DIO0Port = 0
DIO1Pin = 14
DIO1Port = 0
DIO2Pin = 15
DIO2Port = 0
DIO3Pin = 16
DIO3Port = 0


; Define the assigned pins for the QSPI peripheral. Valid options are those existing in your device

; Define the Index of the Write In Progress (WIP) bit in the status register. Valid options are in the range of 0 to 7.
WIPIndex = 0

; Define page size for commands. Valid sizes are PAGE256 and PAGE512.
PPSize = PAGE256

; Custom instructions to send to the external memory after initialization. Only used if --qspicustominit option is given in the call to nrfjprog. Format is 
; instruction code plus data to send in between optional brakets. Numbers can be given in decimal, hex (starting with either 0x or 0X) and binary (starting 
; with either 0b or 0B) formats. The custom instructions will be executed in the order found. 
; This example includes two commands, first a WREN (WRite ENable) and then a WRSR (WRite Satus Register) enabling the Quad Operation and the High Performance
; mode for the MX25R6435F memory present in the nRF52840 DK.
InitializationCustomInstruction =  0x06
InitializationCustomInstruction =  0x01, [0x40, 0, 0x2]&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: XIP problems with a custom board running nrf5340</title><link>https://devzone.nordicsemi.com/thread/385439?ContentTypeID=1</link><pubDate>Fri, 09 Sep 2022 08:01:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:10584250-7cc3-4b1f-9cc5-3c845c4b5bbe</guid><dc:creator>Pelle</dc:creator><description>&lt;p&gt;I&amp;#39;ve changed jedec-id and didn&amp;#39;t help, also updated some other properties. Still doesn&amp;#39;t work when trying to flash the external memory.&lt;/p&gt;
&lt;p&gt;I&amp;#39;m still wondering how the flash procedure for the external flash works. It must be the nordic bootloader in ROM that handles it right? Then it shouldn&amp;#39;t matter at flash-time how the QSPI peripheral is setup by the user in dts files?&lt;br /&gt;I read something about an init file for qspi for flashing, using:&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;--qspiini &amp;lt;file&amp;gt;&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;I&amp;#39;ve been using this so far and probably this is for the devkit (mx25r64 flash):&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;--qspicustominit&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;How to write this QSPI settings file, any examples?&lt;br /&gt;&lt;br /&gt;Thanks&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: XIP problems with a custom board running nrf5340</title><link>https://devzone.nordicsemi.com/thread/385352?ContentTypeID=1</link><pubDate>Thu, 08 Sep 2022 15:01:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:04d7e8bb-f6e3-45b6-9245-e3cb8d3e642e</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;The Devicetree properties are described in &lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.0.2/zephyr/build/dts/api/bindings/mtd/nordic,qspi-nor.html"&gt;the documentation&lt;/a&gt;. You definitely need to change the jedec-id to the ID described in the datasheet of your flash device.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: XIP problems with a custom board running nrf5340</title><link>https://devzone.nordicsemi.com/thread/385321?ContentTypeID=1</link><pubDate>Thu, 08 Sep 2022 13:34:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f62d0ad9-89ef-412c-9cbb-8c952b8495b3</guid><dc:creator>Pelle</dc:creator><description>&lt;p&gt;Hi, I have modified the dts file for the qspi node..&lt;/p&gt;
&lt;p&gt;But not sure exactly what everything means in that node, very confusing. This is how the qspi node looks like now in the .dts file:&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;qspi {
	status = &amp;quot;okay&amp;quot;;
	pinctrl-0 = &amp;lt;&amp;amp;qspi_default&amp;gt;;
	pinctrl-1 = &amp;lt;&amp;amp;qspi_sleep&amp;gt;;
	pinctrl-names = &amp;quot;default&amp;quot;, &amp;quot;sleep&amp;quot;;
	w25q64: w25q64jw@0 {
		compatible = &amp;quot;nordic,qspi-nor&amp;quot;;
		reg = &amp;lt;0&amp;gt;;
		/* MX25R64 supports only pp and pp4io */
		writeoc = &amp;quot;pp4o&amp;quot;;
		/* MX25R64 supports all readoc options */
		readoc = &amp;quot;read4io&amp;quot;;
		sck-frequency = &amp;lt;8000000&amp;gt;;
		label = &amp;quot;W25Q64&amp;quot;;
		jedec-id = [c2 28 17];
		sfdp-bfp = [
			e5 20 f1 ff  ff ff ff 03  44 eb 08 6b  08 3b 04 bb
			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 0f 52
			10 d8 00 ff  23 72 f5 00  82 ed 04 cc  44 83 68 44
			30 b0 30 b0  f7 c4 d5 5c  00 be 29 ff  f0 d0 ff ff
		];
		size = &amp;lt;67108864&amp;gt;;
		has-dpd;
		t-enter-dpd = &amp;lt;10000&amp;gt;;
		t-exit-dpd = &amp;lt;35000&amp;gt;;
	};
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;But still, wondering what happens during the Flash procedure? Is this .dts config used when flashing the external memory?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: XIP problems with a custom board running nrf5340</title><link>https://devzone.nordicsemi.com/thread/385319?ContentTypeID=1</link><pubDate>Thu, 08 Sep 2022 13:31:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0f34aa0e-af61-4ea0-95ba-d58b1f18568c</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Have you added an overlay to define the correct flash chip? The &lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/main/boards/arm/nrf5340dk_nrf5340/nrf5340_cpuapp_common.dts#L172-L196"&gt;MX25R64&lt;/a&gt; is defined in the nRF5340 DK devicetree. If you are using a different flash chip you need to add an overlay with the correct config for that chip. You may reference part of &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/81887/nrf9160-spi-flash-for-cellular-firmware-download/342527"&gt;this post&lt;/a&gt;&amp;nbsp;for a similar flash chip, but that is for SPI and not QSPI.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Jørgen&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>