QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE?

RE: QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE?

Jiri Husak — Mon, 26 Sep 2022 15:18:31 GMT

thanks Torbjørn, your help is appreciated.

Jiri

RE: QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE?

ovrebekk — Mon, 26 Sep 2022 15:00:58 GMT

Hi Jiri

This can't be disabled, no.

There is a hack you can do by reconfiguring the IO0 pin to a different pin that has pull down enabled. Then the WIP bit will be read as 0, and the QSPI peripheral will assume that the operation is complete.

Please note that this might have unintended side effects, and you would obviously have to configure it back before trying to send any commands over the QSPI interface.

Best regards
Torbjørn

RE: QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE?

Jiri Husak — Thu, 22 Sep 2022 14:58:36 GMT

Thanks Torbjørn,

I guess this can't be configured? We would like to switch off the QSPI and go to sleep during the flash process the erase command. However if we do that the ACTIVATE starts this loop (assuming the flash erase is not yet fully finished) and the nrfx driver gets crazy (timeout).

Anyway thanks for answer.

Regards,

Jiri

RE: QSPI Polling of Status Register by QSPI peripheral at ACTIVATE and WRITE?

ovrebekk — Thu, 22 Sep 2022 13:27:48 GMT

Hi Jiri

This is correct, yes. The RDSR command is issued automatically to ensure writes or erase operations are not run too soon.

Best regards
Torbjørn