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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>[nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/92599/nrf52840-dk-spi-transaction-interrupted-by-isr</link><description>Hi, 
 
 I&amp;#39;ve got a display driven over SPI at 8MHz by the lib LVGL in a dedicated Zephyr thread and an ISR configured on one gpio pin that triggers a short routine registering the rising edge of the signal (basically incrementing a var). 
 
 
 
 The used</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 14 Oct 2022 08:49:15 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/92599/nrf52840-dk-spi-transaction-interrupted-by-isr" /><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/390763?ContentTypeID=1</link><pubDate>Fri, 14 Oct 2022 08:49:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eb258e1b-f2cb-4111-acc3-a585dfa9c539</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;Finally, I managed to fix the issue by changing the driver implementation&amp;nbsp;and using the lib :&amp;nbsp;&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;#include &amp;lt;nrfx_spim.h&amp;gt;
// instead of
#include &amp;lt;drivers/spi.h&amp;gt;&lt;/pre&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;span&gt;Doing so permitted to also specify a Data Control pin that&amp;nbsp;&lt;/span&gt;&lt;/span&gt;nrf_spim will handle in one transaction (CMD + DATA in one tx buffer).&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;This fixed the SPI sending sometimes the previous buffer data from the previous SPI tx call concatenated with the&amp;nbsp;new data.&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;The second issue was that the data filled by LVGL wasn&amp;#39;t correct (some text character was disappearing on some frames) was fixed by compiling the used font without subpixel rendering.&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389910?ContentTypeID=1</link><pubDate>Sun, 09 Oct 2022 16:56:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:892e3cbc-e45b-4a12-8c42-ad4beeb26dd4</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;I don&amp;#39;t have any further suggestions sorry, but I am very interested in getting to know the root source of your problems once you find it.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389866?ContentTypeID=1</link><pubDate>Fri, 07 Oct 2022 15:48:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ba3051bf-b82b-435b-a8a6-e5082a7d799e</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;Some news: I managed to look deeper into the SPI transaction by probing the outputs and also on the display driver and found that seems to be two problems:&lt;/p&gt;
&lt;p&gt;1. Input driver buffer&amp;nbsp;on&amp;nbsp;&lt;strong&gt;ssd1333_write &lt;/strong&gt;is already containing what I call &amp;quot;artifacts&amp;quot; (like parts of text disappearing on some frames, from LVGL?) but again, this only occurs when ISR callback called multiple times ( &amp;gt;1k calls per second)&lt;/p&gt;
&lt;p&gt;2. At some point, in the long run under these conditions, an artifact is drawn outside of the instructed area in the screen: I&amp;#39;ve noticed by probing the SPI transaction that the command to set the draw column cursor (0x15h) appears to be also in the first byte of the data part that comes right after the command (as shown in driver code earlier) and the rest of data is right shifted (end of data seems to be dropped, limited by original buffer size).&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I&amp;#39;ll try to change the driver write logic but this seems really strange...&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389778?ContentTypeID=1</link><pubDate>Fri, 07 Oct 2022 09:33:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d2c030ed-9912-47f0-af7d-5df2bf75c05c</guid><dc:creator>AnomalySmith</dc:creator><description>[quote userid="2111" url="~/f/nordic-q-a/92599/nrf52840-dk-spi-transaction-interrupted-by-isr/389717"]CONFIG_LV_DISP_DEF_REFR_PERIOD[/quote]
&lt;p&gt;I already tried to play with this conf and unfortunately, no.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Doubling the buffer doesn&amp;#39;t give much result but now since only one thread is modifying data and&amp;nbsp;accessing to the display buffer (LVGL), it would be surprising otherwise.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I modified the driver to process only calls with exact specified matched coordinates and box size (known in advance) so I can observe only one portion of the screen that is updated by LVGL (i.e. one SPI display write RAM transaction). Results: I can also see artifacts inside the area between some frames.&lt;/p&gt;
&lt;p&gt;But also still more disturbing: when left on long run, an artifact may appear on the outside left portion of the constrained drawn box (that shouldn&amp;#39;t be drawn at all)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389717?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 20:56:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:31a4fe5e-e9bc-4ee5-842a-9e78cb3ac9c7</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Does reducing the display refresh rate help?&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_LV_DISP_DEF_REFR_PERIOD&lt;/span&gt;&lt;span&gt;=50&lt;/span&gt;&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389681?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 15:44:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c63e0263-ee15-479d-8a7f-31179bb372c5</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;I assume you are using SPIM with DMA (ENABLE=7), and not SPI without DMA (ENABLE=1)&amp;nbsp; as the latter would make no sense for a display. If the driver doesn&amp;#39;t support DCX you can add it after the initialisation; it is a hardware feature that can be&amp;nbsp; independent of the Nordic driver (in SPIM DMA mode):&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;APP_ERROR_CHECK(nrf_drv_spi_init(&amp;amp;spi, &amp;amp;spi_config, spi_event_handler, NULL));

// Set pin to an output first then set DCX registers

NRF_SPIM0-&amp;gt;PSELDCX=pin; // Pin select for DCX signal

NRF_SPIM0-&amp;gt;DCXCNT = 1; // This register specifies the number of command bytes preceding the
                       // data bytes. The PSEL.DCX line will be low during transmission of
                       // command bytes and high during transmission of data bytes. Value 0xF
                       // indicates that all bytes are command bytes.&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389569?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 10:00:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1d9177b0-aed8-4a21-96a0-32e7dc6216aa</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;I just tried adding 1ms delay between these lines and also next to&amp;nbsp;&lt;strong&gt;spi_write_dt&lt;/strong&gt;: without success.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;For now, I only think of LVGL having something to do with this weird problem&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389561?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 09:36:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:79153bf0-1377-4fc1-8a2e-abdeee3e7e53</guid><dc:creator>Kenneth</dc:creator><description>[quote user="kme"]gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 1);&lt;br /&gt; errno = spi_write_dt(&amp;amp;config-&amp;gt;bus, &amp;amp;tx_bufs_cmd);&lt;br /&gt; gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 0);[/quote]
&lt;p&gt;If you (for debugging) just add some delay between these lines, can you see the same symptoms? I am just trying to understand (since SPI data is not altered during SPI transmission) what delay is causing the problem.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389550?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 08:52:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ca90cd45-d856-45ae-8d7f-df0bca7bdc9c</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;Thanks for your reply again, only&amp;nbsp;the first thread is updating data as the second reads them and is responsible from SPI transaction (calling LVGL&amp;#39;s related functions). Also, mutexes are used in order to guaranty the integrity of data while accessing them.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;The buffer size is handled by the call (by LVGL lib) to the writes related functions through the SSD1333 driver (default display declared in overlay dts file) :&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;static inline int ssd1333_write_bus(const struct device *dev, BYTE cmd, BYTE *buf, size_t data_len) {
  // printk(&amp;quot;[SSD1333] WRITE BUS\n&amp;quot;);
  const struct ssd1333_config *config = dev-&amp;gt;config;

  int errno;

  BYTE cmd_buf[] = {cmd};

  struct spi_buf tx_buf_cmd = {
    .buf = cmd_buf,
    .len = 1
  };

  struct spi_buf_set tx_bufs_cmd = {
    .buffers = &amp;amp;tx_buf_cmd,
    .count = 1
  };

  gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 1);
  errno = spi_write_dt(&amp;amp;config-&amp;gt;bus, &amp;amp;tx_bufs_cmd);
  gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 0);

  if(!buf || data_len &amp;lt; 1) {
    return errno;
  }

  struct spi_buf tx_buf = {
    .buf = buf,
    .len = data_len
  };

  struct spi_buf_set tx_bufs = {
    .buffers = &amp;amp;tx_buf,
    .count = 1
  };

  errno = spi_write_dt(&amp;amp;config-&amp;gt;bus, &amp;amp;tx_bufs);

  return errno;
}

int ssd1333_write(const struct device *dev, const uint16_t x, const uint16_t y,
        const struct display_buffer_descriptor *desc,
        const void *buf) {
  // printk(&amp;quot;[SSD1333] WRITE\n&amp;quot;);
  size_t buf_len;

  if(desc-&amp;gt;pitch &amp;lt; desc-&amp;gt;width) {
    LOG_ERR(&amp;quot;Pitch is smaller than width&amp;quot;);
    return -1;
  }

  buf_len = desc-&amp;gt;buf_size; // / 8 ???
  if(buf == NULL || buf_len == 0U) {
    LOG_ERR(&amp;quot;Display buffer is not available&amp;quot;);
    return -1;
  }

  if(desc-&amp;gt;pitch &amp;gt; desc-&amp;gt;width) {
    LOG_ERR(&amp;quot;Unsupported mode&amp;quot;);
    return -1;
  }

  // if((y &amp;amp; 0x7) != 0U) {
  //   LOG_ERR(&amp;quot;Unsupported origin y %u&amp;quot;, y);
  //   return -1;
  // }

  /* Check we do not overflow x or y from buffer display_buffer_descriptor */
  struct display_capabilities capabilities;
  display_get_capabilities(dev, &amp;amp;capabilities);

  if((x + desc-&amp;gt;width) &amp;gt; capabilities.x_resolution) {
    LOG_ERR(&amp;quot;Unsupported origin x %u with buffer width setled to %u (screen overflow)&amp;quot;, x, desc-&amp;gt;width);
    return -1;
  }

  if((y + desc-&amp;gt;height) &amp;gt; capabilities.y_resolution) {
    LOG_ERR(&amp;quot;Unsupported origin y %u with buffer height setled to %u (screen overflow)&amp;quot;, y, desc-&amp;gt;height);
    return -1;
  }

  LOG_WRN(&amp;quot;x %u, y %u, pitch %u, width %u, height %u, buf_len %u&amp;quot;,
    x, y, desc-&amp;gt;pitch, desc-&amp;gt;width, desc-&amp;gt;height, buf_len);

  BYTE x_range[] = {SSD1333_DATA_ADDR_RANGE_X[0] + x, SSD1333_DATA_ADDR_RANGE_X[0] + x +(desc-&amp;gt;width - 1)};
  BYTE y_range[] = {SSD1333_DATA_ADDR_RANGE_Y[0] + y, SSD1333_DATA_ADDR_RANGE_Y[0] + y + (desc-&amp;gt;height - 1)};

  // uint32_t total_rows = y2 - y1;
  // uint32_t total_cols = x2 - x1;

  if(ssd1333_write_bus(dev, SSD1333_CMD_SETCOLUMN, x_range, sizeof(x_range)) || ssd1333_write_bus(dev, SSD1333_CMD_SETROW, y_range, sizeof(y_range))) {
    LOG_ERR(&amp;quot;Failed to write command&amp;quot;);
    return -1;
  }

  ssd1333_write_bus(dev, SSD1333_CMD_WRITEINTORAM, (BYTE *)buf, buf_len);

  return 0;
}

[...]

static struct display_driver_api ssd1333_driver_api = {
  .blanking_on = ssd1333_blanking_on,
  .blanking_off = ssd1333_blanking_off,
  .write = ssd1333_write,
  .read = ssd1333_read,
  .get_framebuffer = ssd1333_get_framebuffer,
  .set_brightness = ssd1333_set_brightness,
  .set_contrast = ssd1333_set_contrast,
  .get_capabilities = ssd1333_get_capabilities,
  .set_pixel_format = ssd1333_set_pixel_format,
  .set_orientation = ssd1333_set_orientation
};

#define SSD1333_DEFINE(inst)                                                \
  static const struct ssd1333_config ssd1333_config_##inst = {              \
    .bus = SPI_DT_SPEC_INST_GET(                                            \
      inst, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8), 0),    \
    .dc_gpio = GPIO_DT_SPEC_INST_GET(inst, data_ctrl_gpios),                \
    .reset_gpio = GPIO_DT_SPEC_INST_GET(inst, reset_gpios),                 \
    .width = DT_INST_PROP(inst, width),                                     \
    .height = DT_INST_PROP(inst, height),                                   \
  };                                                                        \
                                                                            \
  static struct ssd1333_data ssd1333_driver_data_##inst;                    \
                                                                            \
  DEVICE_DT_INST_DEFINE(inst,                                               \
                        ssd1333_init,                                       \
                        NULL,                                               \
                        &amp;amp;ssd1333_driver_data_##inst,                        \
                        &amp;amp;ssd1333_config_##inst,                             \
                        POST_KERNEL, CONFIG_DISPLAY_INIT_PRIORITY,          \
                        &amp;amp;ssd1333_driver_api);

DT_INST_FOREACH_STATUS_OKAY(SSD1333_DEFINE)&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389533?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 07:46:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:976a2a98-9edd-4ab7-aeaa-466a20d447a8</guid><dc:creator>Kenneth</dc:creator><description>[quote user="AnomalySmith"]Then, another thread is fed from this same queue and does computation before another updates periodically the view/display.&amp;nbsp;[/quote]
&lt;p&gt;Is it possible that this thread is doing any manipulation or update of the ongoing SPI buffer used by the:&lt;/p&gt;
&lt;p&gt;gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 1);&lt;br /&gt; errno = spi_write_dt(&amp;amp;config-&amp;gt;bus, &amp;amp;tx_bufs_cmd);&lt;br /&gt; gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 0);&lt;/p&gt;
&lt;p&gt;Maybe try to double buffer the SPI data before spi_write_dt()?&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389524?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 07:15:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:40272bf7-3e0d-4fce-9817-57043b88fba2</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/members/kme"&gt;Kenneth&lt;/a&gt;&amp;nbsp;I don&amp;#39;t think so, when I probe the different channels signals are all clean. I also reduced the SPI clock frequency to see if it changes something but not really.&lt;/p&gt;
&lt;p&gt;And yes, your understanding is right, the ISR is just putting a value in a message queue. Then, another thread is fed from this same queue and does computation before another updates periodically the view/display.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Removing the interrupt only get rid of the issue even having the trigger signal on.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389523?ContentTypeID=1</link><pubDate>Thu, 06 Oct 2022 07:08:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:436de118-c1e4-4108-8592-36a26dc45108</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/hmolesworth"&gt;hmolesworth&lt;/a&gt;&amp;nbsp;Yes, my first driver implementation was using &lt;strong&gt;nrfx_spim.h&lt;/strong&gt; and&amp;nbsp;&lt;strong&gt;nrf_spim_&lt;/strong&gt;* functions but now I would like to maximize the compatibility for other platforms using&amp;nbsp;&lt;strong&gt;drivers/spi.h.&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t think there is the same functionality in this lib, right ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389494?ContentTypeID=1</link><pubDate>Wed, 05 Oct 2022 22:19:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f112608b-abda-4e49-9bee-62bc95e846b7</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;Rather than using a gpio pin manually to switch between command/data perhaps use the SPIM DCX functionality which does this for you in hardware:&lt;/p&gt;
&lt;p&gt;spi_config.dcx_pin = data_control_pin;&lt;/p&gt;
&lt;p&gt;&lt;em&gt;6.25.2 D/CX functionality&lt;/em&gt;&lt;br /&gt;&lt;em&gt;Some SPI slaves, for example display drivers, require an additional signal from the SPI master to distinguish&amp;nbsp;&lt;/em&gt;&lt;em&gt;between command and data bytes. For display drivers this line is often called D/CX.&amp;nbsp;&lt;/em&gt;&lt;em&gt;SPIM provides support for such a D/CX output line. The D/CX line is set low during transmission of&amp;nbsp;&lt;/em&gt;&lt;em&gt;command bytes and high during transmission of data bytes.&amp;nbsp;&lt;/em&gt;&lt;em&gt;The D/CX pin number is selected using PSELDCX on page 423 and the number of command bytes&amp;nbsp;&lt;/em&gt;&lt;em&gt;preceding the data bytes is configured using DCXCNT on page 424.&amp;nbsp;&lt;/em&gt;&lt;em&gt;It is not allowed to write to the DCXCNT on page 424 during an ongoing transmission&lt;/em&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389488?ContentTypeID=1</link><pubDate>Wed, 05 Oct 2022 18:42:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eeb61f0c-a2e1-4ea4-9a09-bd07e75f45c1</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Are you sure you don&amp;#39;t have any electrical problems, that you have poor grounding or similiar?&lt;/p&gt;
&lt;p&gt;Do I understand it correctly that your ISR does not trigger any SPI transfer? In other words the ISR does not directly/indirectly affect the transfer of SPI (other than the potential delay it may cause).&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389415?ContentTypeID=1</link><pubDate>Wed, 05 Oct 2022 12:47:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1c6a1e4b-4c4a-476b-9073-511a0c5306f3</guid><dc:creator>AnomalySmith</dc:creator><description>&lt;p&gt;I just probed on MOSI and, so far I can tell, it doesn&amp;#39;t seem to be affected indeed.&lt;/p&gt;
&lt;p&gt;And I don&amp;#39;t have any of&amp;nbsp;&lt;span&gt;CONFIG_SPI_0_NRF_SPIM or&amp;nbsp;CONFIG_SPI_0_NRF_SPI settled in the project. How to be sure EasyDMA is effectively used ?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Anyway I tried shutting down some non-critical applicative threads and it doesn&amp;#39;t change anything, artifacts still there when heavy ISR calls.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;EDIT:&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I also noticed some SPI data may be interpreted as SPI command one (causing&amp;nbsp;random behaviors like inverting the display color, etc.). Looking into the driver, the gpio for&amp;nbsp;&lt;strong&gt;data_control&lt;/strong&gt; pin is handled manually&lt;/span&gt;&lt;strong&gt;&amp;nbsp;&lt;/strong&gt;using &lt;strong&gt;gpio_pin_set_d &lt;/strong&gt;before and after&lt;strong&gt;&amp;nbsp;spi_write_dt&lt;/strong&gt; for data command&lt;b&gt;:&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;&amp;nbsp;&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;  gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 1);
  errno = spi_write_dt(&amp;amp;config-&amp;gt;bus, &amp;amp;tx_bufs_cmd);
  gpio_pin_set_dt(&amp;amp;config-&amp;gt;dc_gpio, 0);&lt;/pre&gt;&lt;/b&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;May it cause issues if process is preempted over there?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: [nRF52840 DK] SPI transaction interrupted by ISR ?</title><link>https://devzone.nordicsemi.com/thread/389406?ContentTypeID=1</link><pubDate>Wed, 05 Oct 2022 12:12:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:07e43c24-4cf1-4a00-adc7-085fe7b097cc</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Have you been able to observe how the interrupts affects the SPI transfer on an logic analyzer?&lt;/p&gt;
&lt;p&gt;I do not see any reason why a frequent pin interrupt should affect the SPI transfer,&amp;nbsp;because once SPI transfer is started it will transfer continously the amount of byte in one chunk (through EasyDMA), unless you have disabled EasyDMA, and thereby using interrupt based SPI transfer. Maybe you can comment whether&amp;nbsp;CONFIG_SPI_0_NRF_SPI or&amp;nbsp;CONFIG_SPI_0_NRF_SPIM is used in your project?&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>