<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/93006/saadc---scan-mode-connects-inputs-to-vdd_gpio</link><description>Hello! 
 
 We are using a custom nRF9160 board with 3 differential ADC channels. The differential voltage is measured across two resistors, with the center voltage (normally OpAmp driven) at 1,66 V. 
 I&amp;#39;m sampling three ADC channels in differential mode</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 22 Nov 2022 14:34:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/93006/saadc---scan-mode-connects-inputs-to-vdd_gpio" /><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/396970?ContentTypeID=1</link><pubDate>Tue, 22 Nov 2022 14:34:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:984c5261-4623-4e1d-b094-8c5dfc2f4fde</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Yeah, pristine build in all cases. Build configuration was always the same, though.&lt;br /&gt;I created a new build configuration, and tried moving the overlay to the project root folder (same as prj.conf). Previously it was in &amp;lt;project_root&amp;gt;/boards.&lt;/p&gt;
&lt;p&gt;No change, P0.14 is still output, P0.10 and P0.11 unchanged.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;If I change the entry in&amp;nbsp;&lt;span&gt;nrf9160_nrf9160_common-pinctrl.dtsi I no longer see the P14 VDD_GPIO spikes using the oscilloscope. So yes, to answer your question is is the P0.14 and P0.15, related to uart1 that is causing my SAADC issues.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/396904?ContentTypeID=1</link><pubDate>Tue, 22 Nov 2022 12:42:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3d144329-ddb3-4ce8-83c7-64f6f61e6f8f</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Hm, are you doing pristine builds? Try deleting the build configuration / build folder and have the change only in the overlay. I assume you are targeting the nrf9160dk_nrf9160_ns board, so the overlay name is correct. Can you try putting the overlay in the project folder, next to prj.conf?&lt;/p&gt;
&lt;p&gt;And when you change the uart1 pins in pinctrl, does the SAADC work properly with the P0.14 and P0.15 pins? So we can confirm that it was causing issues, despite uart1 being disabled?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/396712?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2022 14:52:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:419a30be-1eb5-4c3c-862e-c57ccbfe88e5</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Hi, adding that to the project overlay file, no effect for any&amp;nbsp;PIN_CNF&amp;#39;s for 10, 11, 14 or 15&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1669040120813v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Overlay is included in the build and the other changes (gpio inputs/outputs, aliases and I2C devices) are used in the binary.&lt;br /&gt;However, when I tried changing the pins in nrf9160_nrf9160_common-pinctrl.dtsi it worked as expected, 10=output, 11=input with pull-up, 14 and 15 were inputs with everything disabled.&lt;br /&gt;&lt;br /&gt;Is it possible the overlay isn&amp;#39;t working as we&amp;#39;re building for nonsecure&amp;nbsp;while the TFM configuration is done for the secure target?&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/396638?ContentTypeID=1</link><pubDate>Mon, 21 Nov 2022 12:08:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b8866544-8606-4445-b6f1-cac29c304cd4</guid><dc:creator>&amp;#216;ivind</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Could you add this to your overlay file? It&amp;#39;s just to check whether these pins being defined in the pinctrl node is causing issues despite the uart1 node being disabled. If you get an error when building, try some other unused pins for the RTS and CTS.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
    uart1_default: uart1_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 1)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 1, 10)&amp;gt;;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 0, 0)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 1, 11)&amp;gt;;
			bias-pull-up;
		};
	};

	uart1_sleep: uart1_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 1)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 0, 0)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 1, 10)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 1, 11)&amp;gt;;
			low-power-enable;
		};
	};
};&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/396121?ContentTypeID=1</link><pubDate>Thu, 17 Nov 2022 07:41:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eedb2219-2c04-4a5b-8359-df93f5b77855</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Hovering says &amp;quot;n&amp;quot; when compiled with TFM_LOG_LEVEL_SILENCE=y.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Output&amp;nbsp;.config -file contains:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;CONFIG_TFM_BOARD=&amp;quot;C:/Tools/ncs/v2.0.2/nrf/modules/tfm/tfm/boards/nrf9160&amp;quot;
# CONFIG_TFM_SECURE_UART1 is not set&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/395547?ContentTypeID=1</link><pubDate>Mon, 14 Nov 2022 12:41:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7c05d670-3cc7-42b2-aa7e-c83326b5bb88</guid><dc:creator>Karl Ylvisaker</dc:creator><description>&lt;p&gt;Hello again,&lt;br /&gt;&lt;br /&gt;Thank you for your patience with this.&lt;br /&gt;&lt;br /&gt;I have looked further into this and discussed it with some colleagues, and we found &lt;a href="https://tf-m-user-guide.trustedfirmware.org/platform/nordic_nrf/nrf9160dk_nrf9160/README.html?highlight=secure_uart1#secure-uart-console-on-nrf9160-dk"&gt;this part&lt;/a&gt;&amp;nbsp;about the TF-M logging.&lt;br /&gt;&lt;br /&gt;The default value should be adjusted based on the SILENCE config, but it does not seem to be the case with your application.&lt;br /&gt;&lt;br /&gt;The config for the logging directly reads:&lt;br /&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;config TFM_SECURE_UART1
    bool &amp;quot;TF-M configure UART1 as secure peripheral&amp;quot;
    default y if !TFM_LOG_LEVEL_SILENCE
    depends on !UART_1_NRF_UARTE
    depends on !&amp;quot;$(dt_nodelabel_enabled,uart1)&amp;quot;
    depends on SOC_NRF5340_CPUAPP || SOC_NRF9160
    help
      Configure the UART1 peripheral as secure for TF-M logging.
      This makes the UART1 peripheral unavailable to the non-secure
      application. When this option is selected the device tree node for
      UART1 needs to be disabled for the non-secure application.&lt;/pre&gt;&lt;/p&gt;
&lt;div&gt;Is this currently enabled in your build (despite the SILENCE config)? You can check this by writing TFM_SECURE_UART1 in your prj.conf and hoovering over it with your mouse, for instance.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Karl&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/394315?ContentTypeID=1</link><pubDate>Mon, 07 Nov 2022 07:36:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:150aec72-3f4e-47a9-bc0c-704f2e04aa26</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;&lt;span&gt;TFM_LOG_LEVEL_SILENCE=y had no effect. Here&amp;#39;s a screenshot of the PIN_CNF registers, pins 14 and 15 are the ones which get configured differently so you are probably correct that it&amp;#39;s UART1 related (though it is indeed disabled as seen while debugging registers):&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1667806599110v1.png" /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1667806772411v1.png" alt=" " /&gt;&lt;br /&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/393651?ContentTypeID=1</link><pubDate>Wed, 02 Nov 2022 12:46:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e202ab9c-54ed-46b8-b76d-622436c019ee</guid><dc:creator>Karl Ylvisaker</dc:creator><description>&lt;p&gt;Alright, great - no worries about the time, we&amp;#39;ll continue this whenever you have the chance.&lt;br /&gt;If the behavior you are seeing changes with the inclusion of the TFM log disable while the compiled devicetree stays the same I&amp;#39;ll create another minimal example to try and replicate and explain the behavior.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Karl&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/393568?ContentTypeID=1</link><pubDate>Wed, 02 Nov 2022 06:13:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2828d321-5bc4-4275-9980-07d509a798d1</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I&amp;#39;ll test it when I have the time and report back.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/393465?ContentTypeID=1</link><pubDate>Tue, 01 Nov 2022 12:49:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:458900a0-59a8-4b7a-8bff-2e49bef13141</guid><dc:creator>Karl Ylvisaker</dc:creator><description>&lt;p&gt;That&amp;#39;s peculiar.. does the behavior of the pin change if you add&amp;nbsp;&lt;span&gt;TFM_LOG_LEVEL_SILENCE=y in your prj.conf?&lt;br /&gt;&lt;/span&gt;Based on the compiled devicetree I would not expect so, but I ask just so that we can rule it out.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Karl&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/393268?ContentTypeID=1</link><pubDate>Mon, 31 Oct 2022 14:02:46 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fc439027-e2ec-464d-a7c1-c1da05dbc000</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;The compiled devicetree shows uart1 as &amp;quot;disabled&amp;quot;. All references to UART1 in the compiled devicetree are shown in the post above yours.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/393264?ContentTypeID=1</link><pubDate>Mon, 31 Oct 2022 13:53:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0ecbb1af-df45-4d5d-96a2-6f08182a3e46</guid><dc:creator>Karl Ylvisaker</dc:creator><description>&lt;p&gt;Hello again,&lt;br /&gt;&lt;br /&gt;Thank you for your patience with this.&lt;br /&gt;Since you are building for Non-secure, &lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/ug_tfm.html#building"&gt;you will have TF-M added, which in turn uses UART1 for logging from the secure application&lt;/a&gt;, which is likely why you are seeing this behavior in your application.&lt;/p&gt;
[quote user="JyriLehtinen"]Where exactly should I be looking at, or even better, what would be the best method of finding such definitions?[/quote]
&lt;p&gt;If you check the devicetree in Visual Studio code for your application, does UART1 have the okey status? This is a quick way to check whether the UART1 instance is enabled.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;br /&gt;Karl&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/392609?ContentTypeID=1</link><pubDate>Wed, 26 Oct 2022 12:04:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:209ad7cb-24f9-4bd5-9f8b-93afcec5dc0a</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Hi Karl,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I can&amp;#39;t find any mention of &amp;quot;mcuboot-button0&amp;quot; in the compiled devicetree, any nrf9160-board or zephyr/dts/arm/nordic/ directories, neither does is show in the project devicetree view in VS Code (pin 14 shows it&amp;#39;s unconfigured). I can&amp;#39;t find any overlays for nrf9160-boards in mcuboot-directory either.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Only hit to P0.14 is the pinctrl-node in the uart1-sections, but uart1 is disabled:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;   uart1: arduino_serial: uart@9000 {
                                compatible = &amp;quot;nordic,nrf-uarte&amp;quot;;
                                reg = &amp;lt;0x9000 0x1000&amp;gt;;
                                interrupts = &amp;lt;9 NRF_DEFAULT_IRQ_PRIORITY&amp;gt;;
                                status = &amp;quot;disabled&amp;quot;;
                                label = &amp;quot;UART_1&amp;quot;;
                                current-speed = &amp;lt;115200&amp;gt;;
                                pinctrl-0 = &amp;lt;&amp;amp;uart1_default&amp;gt;;
                                pinctrl-1 = &amp;lt;&amp;amp;uart1_sleep&amp;gt;;
                                pinctrl-names = &amp;quot;default&amp;quot;, &amp;quot;sleep&amp;quot;;
                        };&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;      pinctrl: pin-controller {
                compatible = &amp;quot;nordic,nrf-pinctrl&amp;quot;;
                uart0_default: uart0_default {
                        group1 {
                                psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_RTS, 0, 27)&amp;gt;;
                        };

                        group2 {
                                psels = &amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_CTS, 0, 26)&amp;gt;;
                                bias-pull-up;
                        };

                };

                uart0_sleep: uart0_sleep {
                        group1 {
                                psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_RTS, 0, 27)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_CTS, 0, 26)&amp;gt;;
                                low-power-enable;
                        };

                };

                uart1_default: uart1_default {
                        group1 {
                                psels = &amp;lt;NRF_PSEL(UART_TX, 0, 1)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_RTS, 0, 14)&amp;gt;;
                        };

                        group2 {
                                psels = &amp;lt;NRF_PSEL(UART_RX, 0, 0)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_CTS, 0, 15)&amp;gt;;
                                bias-pull-up;
                        };

                };

                uart1_sleep: uart1_sleep {
                        group1 {
                                psels = &amp;lt;NRF_PSEL(UART_TX, 0, 1)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_RX, 0, 0)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_RTS, 0, 14)&amp;gt;,
                                        &amp;lt;NRF_PSEL(UART_CTS, 0, 15)&amp;gt;;
                                low-power-enable;
                        };

                };&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Where exactly should I be looking at, or even better, what would be the best method of finding such definitions?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/392586?ContentTypeID=1</link><pubDate>Wed, 26 Oct 2022 11:01:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1a7341a9-3663-4a4a-83ab-bd2de5819ce3</guid><dc:creator>Karl Ylvisaker</dc:creator><description>&lt;p&gt;Hello Jyri,&lt;br /&gt;&lt;br /&gt;I am glad to read that you were able to figure out the root cause of this issue. If I could ask, what button are you using for your&amp;nbsp;mcuboot-button0 alias?&lt;br /&gt;If the issue here is that the particular pin is used by mcuboot then it should indeed be visible in the devicetree - if you need this particular pin you could change the alias in the devicetree away from that particular pin as well.&lt;br /&gt;&lt;br /&gt;Best regards,&lt;br /&gt;Karl&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/392323?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2022 09:18:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fa22097a-1899-464b-8618-2f522b6c01ea</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Ok, feels like it&amp;#39;s at least partly solved for now. With the debugger I found that the PIN_CNF -registers were not identical for AIN0 - AIN5, and the P0.14 was configured as Output.&lt;/p&gt;
&lt;p&gt;Setting the PIN_CNF -regs manually&amp;nbsp;and the problem is gone...&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;static void set_pin_cnf(uint8_t pin) {
  NRF_P0_NS-&amp;gt;PIN_CNF[pin] = 
      (GPIO_PIN_CNF_DIR_Input         &amp;lt;&amp;lt; GPIO_PIN_CNF_DIR_Pos) 
    ||(GPIO_PIN_CNF_INPUT_Connect     &amp;lt;&amp;lt; GPIO_PIN_CNF_INPUT_Pos)
    ||(GPIO_PIN_CNF_PULL_Disabled     &amp;lt;&amp;lt; GPIO_PIN_CNF_PULL_Pos)
    ||(GPIO_PIN_CNF_DRIVE_S0S1        &amp;lt;&amp;lt; GPIO_PIN_CNF_DRIVE_Pos)
    ||(GPIO_PIN_CNF_SENSE_Disabled    &amp;lt;&amp;lt; GPIO_PIN_CNF_SENSE_Pos);
}&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I still don&amp;#39;t know why exactly this is the case, as no other part of the code touches GPIO, UART1 is disabled and there&amp;#39;s nothing in the devicetree about P0.14.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/392181?ContentTypeID=1</link><pubDate>Mon, 24 Oct 2022 13:26:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f5204442-cde7-453e-8aef-8a0fcea8311d</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;I did a bit of further testing and discovered that the problem is caused by CONFIG_BOOTLOADER_MCUBOOT=y. I need check what it exactly does that might e.g configure pull-up on&amp;nbsp;the P0.14 pin.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/391703?ContentTypeID=1</link><pubDate>Thu, 20 Oct 2022 13:46:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b5f380b0-5953-4991-a387-4884236aed6b</guid><dc:creator>JyriLehtinen</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;The signal we&amp;#39;re measuring is a floating AC-signal, so the +1,65 V is to average the signal at VDD/2..&lt;/p&gt;
&lt;p&gt;On the test there there was nothing connected to X2.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I replicated the issue with the nRF9160-DK by using voltage divider to generate a voltage of VVD_GPIO/2, and connected both P and N -inputs to this VDD_GPIO/2.&lt;/p&gt;
&lt;p&gt;Using the same code as the initial test&lt;/p&gt;
&lt;p&gt;Scope still displays the step change with a width of roughly TACQ*2.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SAADC - Scan mode connects inputs to VDD_GPIO?</title><link>https://devzone.nordicsemi.com/thread/391688?ContentTypeID=1</link><pubDate>Thu, 20 Oct 2022 13:16:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d8cc2621-4e82-4dd6-8500-600b8548add1</guid><dc:creator>ketiljo</dc:creator><description>&lt;p&gt;Not sure if I understand the problem. You have 2x6 ohm resistors between the AIN inputs with a reference voltage in between? What do you have connected to X2?&lt;/p&gt;
&lt;p&gt;Even with the opamp off, there&amp;#39;s nothing here that can drive the lines up to VDD, unless you have a too high voltage on the X2 connector.&lt;/p&gt;
&lt;p&gt;The configuration seems to be ok for max 0.6 V differential voltage. As long as the voltage isn&amp;#39;t outside rails.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>