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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Questions on ERASEALL and UICR registers.</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/93937/questions-on-eraseall-and-uicr-registers</link><description>Hello, 
 
 I got several questions below: 
 
 1. Once the CTRL_AP setup was already configured below, even if NVMC.ERASEALL is set , does that mean UICR registers ( NRF_UICR -&amp;gt; APPROTECT, and etc ) can&amp;#39;t be changed anymore? 
 
 
 /* Prevent from unlocking</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 16 Nov 2022 21:34:28 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/93937/questions-on-eraseall-and-uicr-registers" /><item><title>RE: Questions on ERASEALL and UICR registers.</title><link>https://devzone.nordicsemi.com/thread/396092?ContentTypeID=1</link><pubDate>Wed, 16 Nov 2022 21:34:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:093be38f-7dab-4533-8d4b-c07a6f5f507b</guid><dc:creator>Naeem Maroof</dc:creator><description>&lt;p&gt;Hi Jaewook,&lt;/p&gt;
&lt;p&gt;Thankyou for contacting DevZone at NordicSemi.&lt;/p&gt;
&lt;p&gt;To enable port protection access for both secure and non-secure modes, we use registers UICR.SECUREAPPROTECT and UICR.APPROTECT, as well as CTRLAP.APPROTECT.DISABLE and CTRLAP.SECUREAPPROTECT.DISABLE; that is what you are doing.&lt;/p&gt;
&lt;p&gt;Erase protection (ERASEPROTECT) protects the flash and UICR parts of the non-volatile memory from being erased. Erase protection can be temporarily disabled from the control access port.&lt;/p&gt;
&lt;p&gt;1) So yes, as per your case description, contents of UICR will not be changed.&lt;br /&gt;2) Yes, such a setup should run every boot as it is app level.&lt;/p&gt;
&lt;p&gt;In fact you can setup your project to see as you have described and observe value and status of registers.&lt;/p&gt;
&lt;p&gt;Thanks,&lt;br /&gt;Naeem&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>