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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/94914/cpuapp-cpunet-firmware</link><description>Hello, Nordicsemi community, 
 I am a bit confused about how I need to proceed in order to use both cores in my nRF5340 that lives in a custom board. 
 I was playing with the DK to do some Enhanced Shock-Burst testing and after following the instruction</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 22 Dec 2022 09:43:39 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/94914/cpuapp-cpunet-firmware" /><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401870?ContentTypeID=1</link><pubDate>Thu, 22 Dec 2022 09:43:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:77e392ee-8808-4b57-a313-32f134f92846</guid><dc:creator>dario.sortino</dc:creator><description>&lt;div id="MathJax_Message" style="display:none;"&gt;&lt;/div&gt;
&lt;p&gt;I think that there is a subtle difference between what you are explaining (and that it actually does), and the &amp;quot;receiving speed of data coming from the other core&amp;quot;, mostly because we are calculating the data output rate within the core. I mean, we are not reading the buffer in the network core and calculating the speed of the application core (and vice-versa), the example instead sends from the appcore and calculate the throughput within that core (and vice-versa). There is no actual exchange of the &amp;quot;p_payload&amp;quot; data between the cores, and for this reason, I think the example is misleading in some way: each core prints the speed of data coming out of the same core.&lt;br /&gt;&lt;br /&gt;Nevertheless, playing with the code I was able to exchange data between the cores, so the ticket can be closed. Thank you so much for the help provided!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401710?ContentTypeID=1</link><pubDate>Wed, 21 Dec 2022 12:51:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b4e4a66-641c-4fc1-b0e1-5ff6170145c0</guid><dc:creator>AstralStorm</dc:creator><description>&lt;p&gt;Why, the example does exactly what it has to do.&lt;br /&gt;It has a known packet size and calculates packets per second that the buffers can take on the other end after receiving an acknowledgment.&lt;br /&gt;Of course this is maximum throughput - network core actually doing something with the packets will make it slower.&lt;br /&gt;It is one way signalling too, if you want to write a loopback you&amp;#39;ll have to write your own test.&lt;br /&gt;&lt;br /&gt;What it does not do is use zero copy transfers, which could make it faster still.&lt;br /&gt;Also it can use ICMsg backend and not RPMsg backend if you pick the different configuration.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401702?ContentTypeID=1</link><pubDate>Wed, 21 Dec 2022 12:23:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:222f7cb6-840a-44ba-b204-30793d91bc78</guid><dc:creator>dario.sortino</dc:creator><description>&lt;p&gt;I am quite confident to say that the example doesn&amp;#39;t do what it is supposed to do. It doesn&amp;#39;t print the throughput of data coming from the other core, because the callback for the received data is never used correctly. It just prints the throughput of output data from the same core.&lt;/p&gt;
&lt;p&gt;I wonder if there is a better place to report this issue (apparently there is no Issue tab on nRF Connect Github page).&lt;/p&gt;
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&lt;div id="MathJax_Message" style="display:none;"&gt;[quote userid="117283" url="~/f/nordic-q-a/94914/cpuapp-cpunet-firmware/401476"]And it says that &amp;quot;&lt;span&gt;both application and network cores periodically print out the receiving speed of data that was sent by the other core&lt;/span&gt;[/quote]&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401476?ContentTypeID=1</link><pubDate>Tue, 20 Dec 2022 10:35:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:92d024bd-cfd2-492d-b88b-be3e0e07f85f</guid><dc:creator>dario.sortino</dc:creator><description>&lt;div id="MathJax_Message" style="display:none;"&gt;&lt;/div&gt;
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&lt;p&gt;I was exploring the IPC Service example here&amp;nbsp;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.2.0/nrf/samples/ipc/ipc_service/README.html"&gt;developer.nordicsemi.com/.../README.html&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;And it says that &amp;quot;&lt;span&gt;both application and network cores periodically print out the receiving speed of data that was sent by the other core&amp;quot;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Although I think I have understood the configuration of the example, it&amp;#39;s not quite clear to me how it is able to print the speed of data.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;In the code&amp;nbsp;&lt;a id="" href="https://github.com/nrfconnect/sdk-nrf/blob/main/samples/ipc/ipc_service/src/main.c"&gt;https://github.com/nrfconnect/sdk-nrf/blob/main/samples/ipc/ipc_service/src/main.c&lt;/a&gt;&amp;nbsp;(that is executed from both cpuapp and cpunet in the default build configuration), I just find a thread defined that run the &amp;quot;check_task&amp;quot;, but it prints info from the p_payload global variable. I don&amp;#39;t get where this p_payload is populated with information that comes from the other core.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401328?ContentTypeID=1</link><pubDate>Mon, 19 Dec 2022 16:10:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e3056a75-9002-4f7e-8b4a-223e8a506ede</guid><dc:creator>AstralStorm</dc:creator><description>&lt;p&gt;You are on the right track. Normally you do not have to care about OpenAMP at all if you use only the IPC services - these hide the thing from you.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401300?ContentTypeID=1</link><pubDate>Mon, 19 Dec 2022 14:09:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:78b50875-86d5-46f9-8dd2-ee2039b1b122</guid><dc:creator>dario.sortino</dc:creator><description>&lt;p&gt;I am finally getting a grasp on how to write for the Network core. So far I&amp;#39;m successfully building and flashing FW on the DK and I can see output from both cores.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;For the data exchange part, I&amp;#39;m still trying to figure everything out, but so far I think the best and easiest way to share data is by using directly IPC services&amp;nbsp;&lt;a href="https://docs.zephyrproject.org/latest/services/ipc/ipc_service/ipc_service.html"&gt;docs.zephyrproject.org/.../ipc_service.html&lt;/a&gt;. Am I on the right track?&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t get the whole backend part you were talking about. The&amp;nbsp;&lt;span&gt;OpenAMP RPMsg is something I need to care about if I use the bare ipc drivers?&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401001?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2022 09:16:18 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a75baa50-1588-4e1e-b210-24e4bb3ad75f</guid><dc:creator>AstralStorm</dc:creator><description>&lt;p&gt;The multicore example is indeed the way to go. Put whatever you want to run on the network core in the cpunet directory. If you want to run bluetooth, copy hci_rpmsg (which is also in samples) in there and start coding from that.&lt;br /&gt;&lt;br /&gt;Unless you want cpunet to just run Bluetooth. In which case using the default hci_rpmsg setup is the way to go.&lt;br /&gt;&lt;br /&gt;You can adjust the example later to work with Secure Bootloader if necessary.&lt;br /&gt;&lt;br /&gt;Be mindful that CPUNET has only 256 KB of flash and 64 KB of RAM by default. Changing that is possible but not too easy. Not a lot can fit in there. It also only has some hardware routed to it.&lt;br /&gt;See here for which hardware is available on cpunet: &lt;a href="https://docs.zephyrproject.org/latest/boards/arm/nrf5340dk_nrf5340/doc/index.html"&gt;docs.zephyrproject.org/.../index.html&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/401000?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2022 09:12:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6a950f4f-6709-401c-9dad-e7500e8bde4d</guid><dc:creator>dario.sortino</dc:creator><description>&lt;div id="MathJax_Message" style="display:none;"&gt;&lt;/div&gt;
&lt;p&gt;Yes, I am very confused about how things work, and I hope to make things clear.&lt;/p&gt;
&lt;p&gt;I had a look at the link you provided me, and I went through the multicore example so that I can try to get it.&lt;/p&gt;
&lt;p&gt;What I&amp;#39;m getting is that the CMakeLists.txt in the aci folder tells Zephyr to build what is inside the cpunet folder for the Network core. In the example, we don&amp;#39;t have anything written in the cpunet folder, but a Cmake that is pointing to the src/main.c.&amp;nbsp;This can be possible because of the definition of a Zephyr module (module.yml). At this point I think I can write a main.c that will be pointed by the cpunet/CMakeLists.txt that execute whatever I want to execute in the Network Core.&lt;/p&gt;
&lt;p&gt;As naive as it may sounds, I&amp;#39;m just trying to figure out where to write code for the Network core and where to write code for the Application, then flashing everything in my board &lt;span class="emoticon" data-url="https://devzone.nordicsemi.com/cfs-file/__key/system/emoji/1f603.svg" title="Smiley"&gt;&amp;#x1f603;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/400991?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2022 08:44:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:42d384b0-b398-41c1-9ed9-532dd0fb4025</guid><dc:creator>AstralStorm</dc:creator><description>&lt;p&gt;You are mixing things up. An application is not the same as a main function or a module.&lt;/p&gt;
&lt;p&gt;You *can* build separate applications. You do not *have to*.&lt;br /&gt;By default, NRF Connect SDK build one multi-image application, with one image per core.&lt;br /&gt;There is also a possibility to build a bootloader as a separate image in an application, used most typically for DFU or similar update schemes.&lt;/p&gt;
&lt;p&gt;These are not necessarily separate in any way, they can share headers or other files, and certainly can share Zephyr or other parts of the SDK.&lt;/p&gt;
&lt;p&gt;There are multiple main functions in such an application and two or more separate hex files are merged together.&lt;/p&gt;
&lt;p&gt;One of the modules runs on CPUNET, the other runs on CPUAPP . Both are built at the same time in a multi-image application.&lt;/p&gt;
&lt;p&gt;There are also applications that run nothing on CPUNET or nothing on CPUAPP.&lt;br /&gt;(The example for multicore application in fact runs a big nothing on CPUAPP.)&lt;/p&gt;
&lt;p&gt;Now provided you want to run code on both, you will have to create two modules. They can be built separately as separate single image builds, which may mean they do not share any code (but they still can), or together as part of a multi-image build in which case they always share the SDK.&lt;/p&gt;
&lt;p&gt;This bit might help explaining the difference between an application and a module: &lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/ug_multi_image.html"&gt;developer.nordicsemi.com/.../ug_multi_image.html&lt;/a&gt;&lt;br /&gt;And this bit might explain the separate bootloaders:&amp;nbsp;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/samples/bootloader/README.html"&gt;developer.nordicsemi.com/.../README.html&lt;/a&gt; &lt;br /&gt;&lt;br /&gt;The non-default separate application per core build is a bit harder to configure. You must ensure the bootloader settings are correct... It is not supported by Nordic.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/400990?ContentTypeID=1</link><pubDate>Fri, 16 Dec 2022 08:39:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:98764c1c-12c5-40a2-8fee-1767b651af67</guid><dc:creator>dario.sortino</dc:creator><description>&lt;div id="MathJax_Message" style="display:none;"&gt;&lt;/div&gt;
&lt;p&gt;When you say&amp;nbsp;sample for CPUNET, it means that i should flash the example&amp;nbsp;in the Network core and flash another, custom application in the Application core? So in the end I should write two main.c that needs to be built each with their own dependencies, am I getting it right?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: CPUAPP-CPUNET Firmware</title><link>https://devzone.nordicsemi.com/thread/400912?ContentTypeID=1</link><pubDate>Thu, 15 Dec 2022 15:48:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a5ccd093-0102-489b-b72b-4f3d723b563b</guid><dc:creator>AstralStorm</dc:creator><description>&lt;p&gt;There are multiple ways to build the application for both cores.&lt;/p&gt;
&lt;p&gt;It partly depends on whether you build the Secure or Non-Secure variant, and it depends on whether you build separate images or (the default) multi image build.&lt;/p&gt;
&lt;p&gt;Nordic examples include a prebuilt app for CPUNET called hci_rpmsg which implements a Bluetooth controller communicating via OpenAMP RPMSG protocol.&lt;/p&gt;
&lt;p&gt;The kernel option to disable it in CPUAPP is: CONFIG_NCS_INCLUDE_RPMSG_CHILD_IMAGE=n&lt;br /&gt;If you put that in prj.conf (or otherwise specified kernel config file) the default child image will not be built and included.&lt;br /&gt;&lt;br /&gt;The default hci_rpmsg can be configured by creating child_image/hci_rpmsg.conf file with Zephyr kernel configuration options. You probably want CONFIG_LOG=y - the defaults will output to the second UART. Configure it like you would logging for CPUAPP.&lt;br /&gt;You can also use RTT output for that core, but attaching there does not work properly with Non-Secure mode applications and will interfere with the execution.&lt;br /&gt;If you build a Non-Secure variant, one of the UARTs is taken by default for logging from TF-M loader. There are kernel options to disable it.&lt;br /&gt;&lt;br /&gt;You can include a custom CPUNET image with some CMake trickery including a zephyr module, see nrf/samples/nrf5340/multicore.&lt;br /&gt;The trickery is required to prevent an infinite include loop.&lt;br /&gt;&lt;br /&gt;hci_rpms uses Zephyr IPC services with OpenAMP RPMsg backend to implement the communication between the cores, a pretty powerful toolkit which is too much to describe in the simple post.&lt;br /&gt;&lt;br /&gt;The details of the backend are configured using the Device Tree, which you can find in the various nrf5340 related device tree dtsi files in Zephyr.&lt;br /&gt;These use nordic,mbox-nrf-ipc for the low level MBOX module configuration and zephyr,ipc-openamp-static-vrings.for the higher level OpenAMP RPMSG configuration which specifies that Mbox.&lt;br /&gt;IPC module is described here: &lt;a id="" href="https://infocenter.nordicsemi.com/topic/ps_nrf5340/ipc.html"&gt;https://infocenter.nordicsemi.com/topic/ps_nrf5340/ipc.html&lt;/a&gt;&lt;br /&gt;But unless you want to do it low level, use Zephyr IPC services instead: &lt;a href="https://docs.zephyrproject.org/latest/services/ipc/ipc_service/ipc_service.html"&gt;docs.zephyrproject.org/.../ipc_service.html&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;Generally since it is CPU-specific rather than board specific you should not need to change them, unless you want to use some sort of external memory for the IPC or need to make the buffers big, whihc would require changing the sram0_shared definition.&lt;br /&gt;&lt;br /&gt;Another example using OpenAMP RPMSG would be in nrf/applications/nrf5340_audio - more complicated, different design.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>