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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>TIMER2 on overflow</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/96103/timer2-on-overflow</link><description>I am looking to trigger an interrupt when Timer2 overflows. What may be the easiest route to accomplish this? I have Timer 2 set at 8 MHz, 32 Bit Length</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 27 Jan 2023 21:02:41 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/96103/timer2-on-overflow" /><item><title>RE: TIMER2 on overflow</title><link>https://devzone.nordicsemi.com/thread/406933?ContentTypeID=1</link><pubDate>Fri, 27 Jan 2023 21:02:41 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:198b0eec-7418-44ce-958d-1e69bf3a764c</guid><dc:creator>Daniel Chisholm</dc:creator><description>&lt;p&gt;There isn&amp;#39;t an &amp;quot;overflow&amp;quot; event per se, however if you set any of the CC registers to 0, that COMPARE event will fire every time the counter overflows and resets to zero.&amp;nbsp; Use the INTENSET mask to cause that to trigger an interrupt for you.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>