nRF5340 IO pin injection current

RE: nRF5340 IO pin injection current

dyoung.mpd — Thu, 16 Feb 2023 23:07:33 GMT

Thank you for the further explanation hmolesworth. I think that the conditions of my application are sufficiently different that the few nA hold-up will not occur but I will dig into it further.

RE: nRF5340 IO pin injection current

hmolesworth — Fri, 10 Feb 2023 23:33:48 GMT

Try breaking the supply from the battery momentarily such that VDD falls reducing current which in turn reduces the rate of voltage drop. At some point the voltage divider from battery supply becomes higher than VDD as the regulator has turned off due to low input voltage. Phantom power now stops the reset working as designed unless the slow discharge (currrent is now few nA)drops below some magic value, but if the battery is replaced or the switch closed before this happens the nRF5x can get stuck and never recover until the battery is removed. If you never see this issue then maybe no worries.

weird-issue-observed-with-nrf52832

RE: nRF5340 IO pin injection current

dyoung.mpd — Thu, 09 Feb 2023 19:56:24 GMT

hmolesworth,

Thank you for the link, however in this case I am not concerned that leakage from +VGENIN_MON will cause the VDD net to rise beyond its rated voltage because it will not be > 2.25V due to resistor divider formed by R12/R13. Also if +VGENIN is present VDD will be greater than 2.25V within a few milliseconds thus shutting down the leakage path.

You did mention a reset not functioning properly due to leakage. I did not come across posts relating input leakage to reset functionality, do you have further posts or insight to share about this effect?

RE: nRF5340 IO pin injection current

Kazi Afroza Sultana — Thu, 09 Feb 2023 11:34:35 GMT

Hello Doug,

"In some operating scenarios the external voltage may be present prior to VDD at the nRF5340" - This is not good as it is out of specification (https://infocenter.nordicsemi.com/topic/ps_nrf5340/chapters/recommended_op_conditions/doc/recommended_op_conditions.html?cp=4_0_0_9). Maximum voltage (for recommended operating conditions) on a pin is Vdd + 0.3 V. When VDD is 0 V, max is 0.3V and the chip will be powered via the ESD diode. Maximum ratings (VDD value is -0.3 to 3.9 V) are the extreme limits to which the chip can be exposed for a limited amount of time without permanently damaging it. Exposure to absolute maximum ratings for prolonged periods of time may affect the reliability of the device. So, it will not be a good design.

Thanks.

Kazi

RE: nRF5340 IO pin injection current

hmolesworth — Wed, 08 Feb 2023 22:02:40 GMT

This circuit will cause problems, in particular with a subsequent reset not functioning correctly due to phantom power (aka back-drive) holding up internal VDD with just a few 100s of nA. Have a look at this and similar posts.

causes-vdd-to-rise-in-deep-sleep-mode