Utilize external flash with nrf9160 SiP on Custom board.

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 19 Apr 2023 08:17:29 GMT

Thank you for your help.

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/420277"]Have you debugged the issue any more since the last comment?[/quote]

No, I have stopped trying finding the issue. Everything works fine in SDK v2.2.0, so I'm not upgrading SDK any further.

Recap to everyone who finds the thread:

- Nrf9160 with external flash (SPI_NOR).

- Cannot use the external flash for storing mcuboot_secondary when using NCS v2.1.3 and below. Without change to the SDK.

- NCS v2.2.0 seems to get everything working.

- NCS v2.3.0 have some changes that break my boot sequence, I have not found a way to fix this.

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Thu, 13 Apr 2023 13:37:45 GMT

[quote user="Replay"]What has changed regarding MCUboot form 2.1.3 to 2.3.0?[/quote]

v2.1.3: MCUboot revision: v1.9.99-ncs2

v2.3.0: MCUboot revision: v1.9.99-ncs4

Comparing these two MCUboot tags: https://github.com/nrfconnect/sdk-mcuboot/compare/v1.9.99-ncs2...v1.9.99-ncs4

Have you debugged the issue any more since the last comment?

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 05 Apr 2023 11:28:40 GMT

Update.

Okay, I got it to work on NCS 2.1.3 but only if I change cmake/partition_manager.cmake L215 to DEVICE "DT_CHOSEN(nordic_pm_ext_flash)"

My next idea was to update to NCS 2.3.0, but now I'm back to user app never starts.

What has changed regarding MCUboot form 2.1.3 to 2.3.0?

- Replay

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Wed, 05 Apr 2023 08:12:07 GMT

"W: Failed reading sectors; BOOT_MAX_IMG_SECTORS=256 - too small?"

The error messages for this are not very exact.

This means one of two things:

CONFIG_BOOT_MAX_IMG_SECTORS is too small
The flash driver for this slot is not detected
- This means that your external flash configuration for the MCUboot child image is wrong somehow

In your case, I guess it is the latter.

To configure the external flash inside the MCUboot child image, see https://github.com/nrfconnect/sdk-nrf/tree/main/tests/modules/mcuboot/external_flash, and its child_image folder.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 05 Apr 2023 07:02:44 GMT

Hi Sigurd

I really appreciate the support.

There has been a development in the situation. I cannot explain how but the mcuboot secondary image is now placed in external flash and the user app is being booted.

The problem is now that im getting this on boot:

*** Booting Zephyr OS build v3.1.99-ncs1-2  ***
I: Starting bootloader
W: Failed reading sectors; BOOT_MAX_IMG_SECTORS=256 - too small?
W: Cannot upgrade: not a compatible amount of sectors
I: Bootloader chainload address offset: 0x10000
I: Jumping to the first image slot
*** Booting Zephyr OS build v3.1.99-ncs1-2  ***

... Main app started ...

Maybe this can be solved with a easy setting?

I have tried increasing CONFIG_BOOT_MAX_IMG_SECTORS=512.

- Replay

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Tue, 04 Apr 2023 12:07:02 GMT

DevZone does not let me reply inline to the last comment, so I reply in the "top" instead.

[quote user="Replay"]I have not found anything that is giving me an idea of why it should not work.[/quote]

If you upload these files, I can have a look myself.
Also include the same files for the application alone (since it works).

[quote user="Replay"]boards/arm/customBoard_nrf9160/c[/quote]

If you post the board folder, I can have a look at this as well.

If you do not want to upload your files in a public case, you can just create a new private ticket for these, and then Sigurd Hellesvik and I will find it.

Do you have a nRF9160DK?
Cause if you do, we can try to reproduce for the DK and then I can have a similar project on my end.

[quote user="Replay"]and I'm totally lost on the cause for this failure.[/quote]

This case is approaching the point where I struggle to help without being able to reproduce.
If you have an extra custom PCB laying around, you can ship it to me, and I can reproduce the issue here.
This way, I can use the experience and tools I got at my disposal to debug this issue.
Let me know if you want this, and I will send you my shipping info on your DevZone-registered email.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Tue, 04 Apr 2023 07:56:35 GMT

Okay I have been looking in to this problem the past few days, and I'm totally lost on the cause for this failure.

If you got time, I'll post the total overview for you to get the full picture.

- NCS: 2.3.0

- SiP: nrf9160 on custom board

- External Flash: mx25r16

Project setup:

boards/arm/customBoard_nrf9160/customBoard_nrf9160_common-pinctrl.dtsi:

&pinctrl {
	spi0_default: spi0_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 2)>,
				<NRF_PSEL(SPIM_MOSI, 0, 1)>,
				<NRF_PSEL(SPIM_MISO, 0, 0)>;
		};
	};

	spi0_sleep: spi0_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 2)>,
				<NRF_PSEL(SPIM_MOSI, 0, 1)>,
				<NRF_PSEL(SPIM_MISO, 0, 0)>;
			low-power-enable;
		};
	};
};

boards/arm/customBoard_nrf9160/customBoard_nrf9160_common.dts:

&spi0 {
	compatible = "nordic,nrf-spim";
	status = "okay";
	pinctrl-0 = <&spi0_default>;
	pinctrl-1 = <&spi0_sleep>;
	pinctrl-names = "default", "sleep";
	cs-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  mx25r16: mx25r1635f@0 {
    compatible = "jedec,spi-nor";
    reg = <0>;
    spi-max-frequency = <8000000>;
    jedec-id = [c2 28 15];
    size = <16777216>;
    reset-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  };
};

prj.conf:

CONFIG_SPI=y
CONFIG_SPI_NOR=y
CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY=y
CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
CONFIG_MULTITHREADING=y
CONFIG_BUILD_WITH_TFM=y
CONFIG_BOOTLOADER_MCUBOOT=y

child_image\mcuboot.conf:

CONFIG_SPI=y
CONFIG_SPI_NOR=y
CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096

CONFIG_BOOT_SIGNATURE_KEY_FILE="C:/ncs/xxx/certs/private_mcuboot.pem"

CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y

CONFIG_MULTITHREADING=y

CONFIG_SIZE_OPTIMIZATIONS=y

# MCUboot requires a large stack size, otherwise an MPU fault will occur
CONFIG_MAIN_STACK_SIZE=10240

# Enable flash operations
CONFIG_FLASH=y

# This must be increased to accommodate the bigger images.
CONFIG_BOOT_MAX_IMG_SECTORS=256

child_image/mcuboot/customBoard_nrf960.overlay:

/ {	
	chosen {
    nordic,pm-ext-flash = &mx25r16;
	};
};

customBoard_nrf960_ns.overlay:

/ {
	chosen {
        nordic,pm-ext-flash = &mx25r16;
	};
};

Partition manager report:

  external_flash (0x200000 - 2048kB):
+---------------------------------------------+
| 0x0: mcuboot_secondary (0xe8000 - 928kB)    |
| 0xe8000: external_flash (0x118000 - 1120kB) |
+---------------------------------------------+

  flash_primary (0x100000 - 1024kB):
+--------------------------------------------------+
| 0x0: mcuboot (0xc000 - 48kB)                     |
| 0xc000: EMPTY_0 (0x4000 - 16kB)                  |
+---0x10000: mcuboot_primary (0xe8000 - 928kB)-----+
+---0x10000: tfm_secure (0x8000 - 32kB)------------+
| 0x10000: mcuboot_pad (0x200 - 512B)              |
+---0x10200: mcuboot_primary_app (0xe7e00 - 927kB)-+
| 0x10200: tfm (0x7e00 - 31kB)                     |
+---0x18000: tfm_nonsecure (0xe0000 - 896kB)-------+
| 0x18000: app (0xe0000 - 896kB)                   |
+---0xf8000: nonsecure_storage (0x2000 - 8kB)------+
| 0xf8000: settings_storage (0x2000 - 8kB)         |
+--------------------------------------------------+
| 0xfa000: EMPTY_1 (0x6000 - 24kB)                 |
+--------------------------------------------------+

  otp (0x2f4 - 756B):
+------------------------------+
| 0xff8108: otp (0x2f4 - 756B) |
+------------------------------+

  sram_primary (0x40000 - 256kB):
+--------------------------------------------------+
+---0x20000000: mcuboot_sram (0x8000 - 32kB)-------+
+---0x20000000: sram_secure (0x8000 - 32kB)--------+
| 0x20000000: tfm_sram (0x8000 - 32kB)             |
+---0x20008000: sram_nonsecure (0x38000 - 224kB)---+
+---0x20008000: nrf_modem_lib_sram (0x4568 - 17kB)-+
| 0x20008000: nrf_modem_lib_ctrl (0x4e8 - 1kB)     |
| 0x200084e8: nrf_modem_lib_tx (0x2080 - 8kB)      |
| 0x2000a568: nrf_modem_lib_rx (0x2000 - 8kB)      |
+--------------------------------------------------+
| 0x2000c568: sram_primary (0x33a98 - 206kB)       |
+--------------------------------------------------+

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/417683"]

On that topic, compare the following to see if you can find anything suspicious:

build/zephyr/.config
build/zephyr/zephyr.dts
build/mcuboot/zephyr/.config
build/mcuboot/zephyr/zephyr.dts

[/quote]I have not found anything that is giving me an idea of why it should not work.

Thank you for the help 😃

- Replay

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Mon, 27 Mar 2023 12:52:29 GMT

Maybe, but that would be a bit odd.
You can try to set them though.

Also check build/mcuboot/zephyr/.config, as this is for the bootloader.

On that topic, compare the following to see if you can find anything suspicious:

build/zephyr/.config
build/zephyr/zephyr.dts
build/mcuboot/zephyr/.config
build/mcuboot/zephyr/zephyr.dts

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Mon, 27 Mar 2023 12:09:33 GMT

In build/zephyr/.config, the only difference from nrf9160 DK, is the TF-M UART pins:

nrf9160 DK:

CONFIG_TFM_UART0_TXD_PIN=29

CONFIG_TFM_UART0_RXD_PIN=28

CONFIG_TFM_UART0_RTS_PIN=27

CONFIG_TFM_UART0_CTS_PIN=26

Custom board:

CONFIG_TFM_UART0_TXD_PIN=4294967295

CONFIG_TFM_UART0_RXD_PIN=4294967295

CONFIG_TFM_UART0_RTS_PIN=4294967295

CONFIG_TFM_UART0_CTS_PIN=4294967295

Can this has an effect on the problem?

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Mon, 27 Mar 2023 11:53:59 GMT

[quote user="Replay"]No, not by intention.[/quote]

This is a frequent source to problems similar to the one you see: The project fails if MCUboot is enabled.

For example: RE: Enabling MCUBOOT does not run application

Try to explicitly set all configurations relevant for your custom board inside mcuboot.conf as well.

[quote user="Replay"]I'm not sure what you are referring to.[/quote]

I was asking if you used child_image/mcuboot.conf. You answered this in the same answer. This is the correct way to do it.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Fri, 24 Mar 2023 09:30:01 GMT

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/417341"]If you build using VS Code, make sure that you do not have debugging options inthe build configuration screen here either.[/quote]

No debugging is enabled. No debugging in prj.conf and not in the configuration screen.

child_image / mcuboot.conf:

CONFIG_NORDIC_QSPI_NOR=n
CONFIG_SPI=y
CONFIG_SPI_NOR=y
CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096

CONFIG_BOOT_SIGNATURE_KEY_FILE="C:/ncs/xxxx/certs/private_mcuboot.pem"

CONFIG_MULTITHREADING=y

CONFIG_SIZE_OPTIMIZATIONS=y

# MCUboot requires a large stack size, otherwise an MPU fault will occur
CONFIG_MAIN_STACK_SIZE=10240

# Enable flash operations
CONFIG_FLASH=y

# This must be increased to accommodate the bigger images.
CONFIG_BOOT_MAX_IMG_SECTORS=256

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/417341"]How do you include mcuboot.conf into your project?[/quote]

I'm not sure what you are referring to.

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/417341"]Do you have configurations relevant for your custom board inside mcuboot.conf?[/quote]

No, not by intention.

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/417341"]Does you project work without the Bootlaoder?[/quote]

I'll get back regarding this information.

(Edit): Yes, it runs as expected when removing bootloader.

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Fri, 24 Mar 2023 09:02:40 GMT

If you build using VS Code, make sure that you do not have debugging options inthe build configuration screen here either.

Other typical issues that cause MCUboot to run and not the application is that important configurations are missing for the MCUboot child image.

How do you include mcuboot.conf into your project?

Do you have configurations relevant for your custom board inside mcuboot.conf?

Does you project work without the Bootlaoder?

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Fri, 24 Mar 2023 07:45:39 GMT

Sorry for the late reply..

I have no Debugging Option enabled in prj.conf or mcuboot.conf.

- Replay

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Thu, 16 Mar 2023 11:59:07 GMT

When you build, do you have Debugging Options enabled?

If you do, try to build without Debugging Options.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 15 Mar 2023 07:30:08 GMT

Okay thank you.

I have upgraded the SDK version from 2.0.0 to 2.3.0 and it builds fine and when I run it it, it gives this output:

The only problem is that it never boot up the user app.

I have added a more verbose logging:

[00:00:00.379,150] <ESC>[0m<inf> NRFX_SPIM: Function: nrfx_spim_init, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.387,695] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x20005290 - rx_bufs 0x20005298 - 1<ESC>[0m<CR><LF>
[00:00:00.398,315] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200052a0 (2), current_rx 0x200052a0 (2), tx buf/len 0x20005288/1, rx buf/len 0x20005288/1<ESC>[0m<CR><LF>
[00:00:00.414,123] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.421,630] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x200052d7/1<ESC>[0m<CR><LF>
[00:00:00.430,114] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x200052d7/1<ESC>[0m<CR><LF>
[00:00:00.438,629] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.446,746] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.454,254] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.462,310] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.470,367] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:00.479,644] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.487,792] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200052a8 - rx_bufs 0x200052b0 - 1<ESC>[0m<CR><LF>
[00:00:00.498,413] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200052b8 (2), current_rx 0x200052b8 (2), tx buf/len 0x200052a0/1, rx buf/len 0x200052a0/1<ESC>[0m<CR><LF>
[00:00:00.514,221] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.521,728] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x2000530c/3<ESC>[0m<CR><LF>
[00:00:00.530,212] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x2000530c/3<ESC>[0m<CR><LF>
[00:00:00.538,696] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.546,844] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.554,351] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.562,408] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.570,465] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:00.579,742] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
*** Booting Zephyr OS build v3.2.99-ncs2 ***<CR><LF>
[00:00:00.591,949] <ESC>[0m<dbg> os: k_sched_unlock: scheduler unlocked (0x20000338:0)<ESC>[0m<CR><LF>
[00:00:00.599,731] <ESC>[0m<inf> mcuboot: Starting bootloader<ESC>[0m<CR><LF>
[00:00:00.605,804] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x20005238 - rx_bufs 0x20005240 - 1<ESC>[0m<CR><LF>
[00:00:00.616,394] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x20005248 (2), current_rx 0x20005248 (2), tx buf/len 0x20005230/4, rx buf/len 0x20005230/4<ESC>[0m<CR><LF>
[00:00:00.632,202] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.639,709] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20001830/32<ESC>[0m<CR><LF>
[00:00:00.648,284] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20001830/32<ESC>[0m<CR><LF>
[00:00:00.656,890] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.665,008] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.672,546] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.680,572] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.688,629] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:00.697,906] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.706,146] <ESC>[0m<inf> mcuboot: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<ESC>[0m<CR><LF>
[00:00:00.716,186] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051d8 - rx_bufs 0x200051e0 - 1<ESC>[0m<CR><LF>
[00:00:00.726,837] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200051e8 (2), current_rx 0x200051e8 (2), tx buf/len 0x200051d0/4, rx buf/len 0x200051d0/4<ESC>[0m<CR><LF>
[00:00:00.742,645] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.750,152] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20005238/16<ESC>[0m<CR><LF>
[00:00:00.758,728] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20005238/16<ESC>[0m<CR><LF>
[00:00:00.767,303] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.775,451] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.782,958] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.790,985] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.799,041] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:00.808,319] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.816,497] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051d8 - rx_bufs 0x200051e0 - 1<ESC>[0m<CR><LF>
[00:00:00.827,117] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200051e8 (2), current_rx 0x200051e8 (2), tx buf/len 0x200051d0/4, rx buf/len 0x200051d0/4<ESC>[0m<CR><LF>
[00:00:00.842,926] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.850,433] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20005237/1<ESC>[0m<CR><LF>
[00:00:00.858,917] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20005237/1<ESC>[0m<CR><LF>
[00:00:00.867,431] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.875,549] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.883,087] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.891,143] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.899,200] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:00.908,477] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.916,625] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051c8 - rx_bufs 0x200051d0 - 1<ESC>[0m<CR><LF>
[00:00:00.927,246] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200051d8 (2), current_rx 0x200051d8 (2), tx buf/len 0x200051c0/4, rx buf/len 0x200051c0/4<ESC>[0m<CR><LF>
[00:00:00.943,084] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.950,592] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20005292/1<ESC>[0m<CR><LF>
[00:00:00.959,075] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20005292/1<ESC>[0m<CR><LF>
[00:00:00.967,559] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:00.975,677] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:00.983,215] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.991,241] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:00.999,298] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.008,575] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.016,754] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051c8 - rx_bufs 0x200051d0 - 1<ESC>[0m<CR><LF>
[00:00:01.027,374] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200051d8 (2), current_rx 0x200051d8 (2), tx buf/len 0x200051c0/4, rx buf/len 0x200051c0/4<ESC>[0m<CR><LF>
[00:00:01.043,182] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.050,689] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20005293/1<ESC>[0m<CR><LF>
[00:00:01.059,173] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20005293/1<ESC>[0m<CR><LF>
[00:00:01.067,687] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.075,805] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.083,312] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.091,369] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.099,426] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.108,703] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.116,851] <ESC>[0m<inf> mcuboot: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3<ESC>[0m<CR><LF>
[00:00:01.127,075] <ESC>[0m<inf> mcuboot: Boot source: none<ESC>[0m<CR><LF>
[00:00:01.132,507] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x20005238 - rx_bufs 0x20005240 - 1<ESC>[0m<CR><LF>
[00:00:01.143,127] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x20005248 (2), current_rx 0x20005248 (2), tx buf/len 0x20005230/4, rx buf/len 0x20005230/4<ESC>[0m<CR><LF>
[00:00:01.158,935] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.166,442] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20001830/32<ESC>[0m<CR><LF>
[00:00:01.175,018] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20001830/32<ESC>[0m<CR><LF>
[00:00:01.183,624] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.191,741] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.199,249] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.207,305] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.215,362] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.224,639] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.232,818] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051f8 - rx_bufs 0x20005200 - 1<ESC>[0m<CR><LF>
[00:00:01.243,408] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x20005208 (2), current_rx 0x20005208 (2), tx buf/len 0x200051f0/4, rx buf/len 0x200051f0/4<ESC>[0m<CR><LF>
[00:00:01.259,216] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.266,723] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20005258/16<ESC>[0m<CR><LF>
[00:00:01.275,299] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20005258/16<ESC>[0m<CR><LF>
[00:00:01.283,905] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.292,022] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.299,530] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.307,586] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.315,643] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.324,920] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.333,099] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051f8 - rx_bufs 0x20005200 - 1<ESC>[0m<CR><LF>
[00:00:01.343,719] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x20005208 (2), current_rx 0x20005208 (2), tx buf/len 0x200051f0/4, rx buf/len 0x200051f0/4<ESC>[0m<CR><LF>
[00:00:01.359,527] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.367,034] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20005257/1<ESC>[0m<CR><LF>
[00:00:01.375,518] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20005257/1<ESC>[0m<CR><LF>
[00:00:01.384,033] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.392,150] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.399,658] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.407,714] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.415,771] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.425,048] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.433,227] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051e8 - rx_bufs 0x200051f0 - 1<ESC>[0m<CR><LF>
[00:00:01.443,847] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200051f8 (2), current_rx 0x200051f8 (2), tx buf/len 0x200051e0/4, rx buf/len 0x200051e0/4<ESC>[0m<CR><LF>
[00:00:01.459,655] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.467,163] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x200052a2/1<ESC>[0m<CR><LF>
[00:00:01.475,646] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x200052a2/1<ESC>[0m<CR><LF>
[00:00:01.484,161] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.492,279] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.499,816] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.507,873] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.515,930] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.525,207] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.533,355] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200051e8 - rx_bufs 0x200051f0 - 1<ESC>[0m<CR><LF>
[00:00:01.543,975] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200051f8 (2), current_rx 0x200051f8 (2), tx buf/len 0x200051e0/4, rx buf/len 0x200051e0/4<ESC>[0m<CR><LF>
[00:00:01.559,783] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.567,291] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x200052a3/1<ESC>[0m<CR><LF>
[00:00:01.575,805] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x200052a3/1<ESC>[0m<CR><LF>
[00:00:01.584,289] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.592,407] <ESC>[0m<dbg> NRFX_SPIM: irq_handler: Event: NRF_SPIM_EVENT_END.<ESC>[0m<CR><LF>
[00:00:01.599,945] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.608,001] <ESC>[0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len (nil)/0<ESC>[0m<CR><LF>
[00:00:01.616,058] <ESC>[0m<dbg> spi_nrfx_spim: transfer_next_chunk: Transaction finished with status 0<ESC>[0m<CR><LF>
[00:00:01.625,335] <ESC>[0m<inf> NRFX_SPIM: Function: spim_xfer, error code: NRFX_SUCCESS.<ESC>[0m<CR><LF>
[00:00:01.633,483] <ESC>[0m<inf> mcuboot: Swap type: none<ESC>[0m<CR><LF>
[00:00:01.742,462] <ESC>[0m<inf> mcuboot: Bootloader chainload address offset: 0x10000<ESC>[0m<CR><LF>
[00:00:01.750,213] <ESC>[0m<inf> mcuboot: Jumping to the first image slot<ESC>[0m<CR><LF>

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Tue, 14 Mar 2023 12:13:48 GMT

Good find!

The potential issues mentioned in that thread should be fixed in future versions of the nRF Connect SDK.
So yes, if it is possible for you, upgrading your project would likely be a good idea.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Mon, 13 Mar 2023 13:53:42 GMT

Due to a mistake from my side I did not save the state where is was stock in a endless "Starting bootloader" loop.

I'm back to the BUS FAULT, as described above.

But in my search for a solution for the endless "Starting bootloader" loop, I did find this:

RE: nRF9160dk FOTA using external flash, ncs 2.0.2

Will it be the best idea to start using nRF Connect SDK version 2.3.0 for avoiding any problems relating to this?

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Fri, 10 Mar 2023 08:19:39 GMT

Do you have logs in your application?

For debugging, try to configure your application with CONFIG_RESET_ON_FATAL_ERROR=n.

Do you still get a loop with this config?

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 08 Mar 2023 12:47:04 GMT

Okay it builds fine but it enters a "Starting bootloader" loop.

It will continue forever.

Maybe the bootloader is placed at the first image slot?

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Wed, 08 Mar 2023 11:32:47 GMT

...For the bus fault, try to configure CONFIG_THREAD_NAME to get a thread name instead of (unknown).

For configurations for the external flash for the nRF9160, I recommend that you have a look at the configurations in https://github.com/simon-iversen/sdk-nrf/tree/d1a11f2c39e3b8fb0af7652e7e720626f0e1298e/samples/nrf9160/http_update/application_update/child_image/mcuboot. I am guessing that you are missing some of those to make it work, for example CONFIG_PM_PARTITION_SIZE_MCUBOOT, CONFIG_FLASH or CONFIG_MULTITHREADING.

[quote user="Replay"]How to validate the external flash is initialized for MCUboot?[/quote]

Check the build/mcuboot/zephyr.dts to see that it is enabled in DTS.

Then double check that you have all needed drivers enabled in the Kconfig. You can double check that these have been enabled by running "ninja menuconfig" inside build/mcuboot.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 08 Mar 2023 10:34:43 GMT

[quote userid="106736" url="~/f/nordic-q-a/97194/utilize-external-flash-with-nrf9160-sip-on-custom-board/414041"]CONFIG_BOOT_MAX_IMG_SECTORS is too small. Try setting this to 256 in mcuboot.conf.[/quote]

After trying this the runtime output is:

I have read the links you are linking to.

How to validate the external flash is initialized for MCUboot?

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Wed, 08 Mar 2023 09:06:06 GMT

In my experience, the warning "W: Failed reading sectors; BOOT_MAX_IMG_SECTORS=128 - too small?" can mean two things:

CONFIG_BOOT_MAX_IMG_SECTORS is too small. Try setting this to 256 in mcuboot.conf.
The external flash driver has not been initialized for MCUboot.
Have you configured Using external flash memory partitions, and more specifically, External flash memory partitions?

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Wed, 08 Mar 2023 07:14:51 GMT

Okay, I have misunderstood the purpose of the pm_static.yml file.

Everything is building fine now and the partition_manager_report makes sense to me.

But now I'm back to:

I have been following along with this thread: RE: MCUBoot, Zephyr, and static partition manager

There is a difference, I get an ERROR: Image in the primary slot is not valid! - So maybe there is an another problem.

Hope you can help.

RE: Utilize external flash with nrf9160 SiP on Custom board.

Sigurd Hellesvik — Tue, 07 Mar 2023 13:54:03 GMT

That number is in decimal. 2097152 = 0x200000

In my below sample I think I have too many Zeros.

Try to change it to use 100 000 and 200 000 instead.

Regards,
Sigurd Hellesvik

RE: Utilize external flash with nrf9160 SiP on Custom board.

Replay — Tue, 07 Mar 2023 13:50:35 GMT

I still get the same build error.

I cannot increase the size of the external flash to more than 0x200000.