nRF9160 SPI Loopback SDK 2.3.0

RE: nRF9160 SPI Loopback SDK 2.3.0

Kenneth — Wed, 29 Mar 2023 10:56:10 GMT

Hello,

Unfortunatly it's not possible for pins to overlap functionality, even though I see the idea in this case. So you do need to use two sets of gpios for spi master and slave in this case (so a total of 8pins).

Ref reason behind the 'spi-dev-a@0' { reg = <0>; }

See:
https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/build/dts/intro.html#unit-address-examples

"An index representing the peripheral’s chip select line number. (If there is no chip select line, 0 is used.)"

Also see:
https://github.com/nrfconnect/sdk-zephyr/blob/v3.2.99-ncs2/include/zephyr/devicetree/spi.h#L83

Best regards,
Kenneth

RE: nRF9160 SPI Loopback SDK 2.3.0

Logstor — Thu, 23 Mar 2023 14:34:31 GMT

Hi Vidar, thanks for the answer! :)

Below is a screenshot of my serial terminal running baud 9600 as specified in the overlay for uart0. I flashed the same program to the board, but with CONFIG_RESET_ON_FATAL_ERROR=n. On initial reset the first two question marks, and then on another manual reset with reset button, then the other two came. For some reason it's like it turns off the uart logging backend?

Regarding the DTS overlay pinout - I've just now read about the external memory, but I'm not using this, and I just planned to use that SPI interface in my loopback test. I guess that the external memory is turned off by default, so I'm free to use those SPI registers for communication with something else than the external memory?

I've looked at your colleagues example, and I can see that I've done some things right, but there's also a couple of things I don't understand in his devicetree. Below is a screenshot of a small part of his devicetree, here I don't understand why SPIS_CSN pin number(14) doesn't match 'cs-gpios' pin number(28). Is it because he connect pin 14 and 28 with a physical wire?

Lastly, I dont understand the 'reg_my_spi_master'. What does it do, and why is it necessary. I see it in his code, but unfortunately I still don't get it? :)

Picture of my new devicetree overlay below. I've added the SPIS_CSN to the spi2 pinctrl, and added 'cs-gpios' to the spi3 with the same pin number as SPIS_CSN, because I intend to not use any wires. If that's possible of course.

I think I need to get the logging to work, and then be sure my setup with no wires and spi2 and spi3 sharing pins is possible, before I update all the code and try again.

Hope my answer makes sense ☺

RE: nRF9160 SPI Loopback SDK 2.3.0

Vidar Berg — Wed, 22 Mar 2023 13:53:28 GMT

Hello,

[quote user=""]I have the nRF9160DK and I have had a really good experience with it so far getting MCU, Modem, LTE, GNSS, Logging and CoAP working.[/quote]

I am happy to hear that you have had a good experience with the kit so far.

The chip select line must be controlled dynamically be the SPIM to allow the SPIS to operate. If it is always asserted, the CPU will not be able to update the DMA buffer, see Semaphore operation.

[quote user=""]Is the described idea even possible?[/quote]

Yes. A colleague of mine has made a SPI loopback example which he has made available on Github: https://github.com/too1/ncs-spi-master-slave-example.

[quote user=""]In my current test logging through default, UART via USB doesn't work.

Commenting out two lines with 'spi_read_dt()' and 'spi_write_dt()' makes logging work again for some reason.

[/quote]

Without these lines commented, please try to build with CONFIG_RESET_ON_FATAL_ERROR=n and see if you get a crashlog on UART.

[quote user=""]

Is my devicetree overlay file correct for this SPI configuration?
- In general, my understanding of devicetrees struggles, especially the use of 'pinctrl' over the deprecated miso-pin, mosi-pin etc.

[/quote]

It looks to be OK. I was not able to spot any errors. But I am not sure about the pinout, are they not connected to the flash on your board (External memory)?

Best regards,

Vidar