https://devzone.nordicsemi.com/f/nordic-q-a/9837/problems-with-spi-on-nrf52-no-signalWe are running tests using the spi_master_with_spi_slave example and using an oscilloscope to see if we are getting any signal from the clock or the MOSI but we have not received any signal, we also tried the spi_master example and got nothing. No waveformen-USTelligent Community 13Wed, 21 Oct 2015 18:26:25 GMThttps://devzone.nordicsemi.com/thread/36515?ContentTypeID=1Wed, 21 Oct 2015 18:26:25 GMT137ad170-7792-4731-bb38-c0d22fbe4515:23a9e58e-a4e6-4ed8-abe5-92df9d57cfc7Abhi<p>Thank you for your answer</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/36514?ContentTypeID=1Wed, 21 Oct 2015 09:12:58 GMT137ad170-7792-4731-bb38-c0d22fbe4515:ab3bc64a-e65e-46ce-8fe1-5416857d92aeMartinBL<p>I think you have misunderstood the pin numbering convention. The pin number defines in the pca10028.h file are referring to the GPIO pin numbers, not the sequential numbering of the physical pins around the chip. I.e. with the connections shown in your image use these pin defines:</p> <pre><code>#define SPIM0_SCK_PIN 25 /**&lt; SPI clock GPIO pin number. */ #define SPIM0_MOSI_PIN 23 /**&lt; SPI Master Out Slave In GPIO pin number. */ #define SPIM0_MISO_PIN 24 /**&lt; SPI Master In Slave Out GPIO pin number. */ #define SPIM0_SS_PIN 22 /**&lt; SPI Slave Select GPIO pin number. */ </code></pre> <p>given that you are using SPIM0 as your image suggest.</p> <p>This numbering convention is used to make it easier to manipulate multiple GPIO pins at the same time without having to worry about where the VDD pins, VSS pins, etc are.</p><div style="clear:both;"></div>