RE: k_work_reschedule failed after 53 interacts

Kenneth — Tue, 11 Apr 2023 10:51:51 GMT

Thanks for sharing!

Kenneth

RE: k_work_reschedule failed after 53 interacts

FlavioPiracicaba — Sat, 08 Apr 2023 23:11:56 GMT

Now it's working. The problem is the k_malloc() was taking space on the memory until filled it all up

In Peripheral_Uart example, there is two k_malloc() and one k_free(). After I installed the logical analyser, I could see a signal I instaled, the k_free() was never being called. Then I removed the case of UART_RX_BUF_REQUEST because is not being used. Now there is a pair k_malloc and k_free. My suggest is correct the peripheral_uart example.

static void uart_cb_2(const struct device *dev, struct uart_event *evt, void *user_data){
    
	ARG_UNUSED(dev);
	static bool disable_req;
    struct uart_data_t *buf2;
   
 	switch (evt->type) {
	
    case UART_RX_RDY:
		buf2 = CONTAINER_OF(evt->data.rx.buf, struct uart_data_t, data);
		buf2->len += evt->data.rx.len;
		if (disable_req) {
			return;
		}
        //CR = Carriage Return ( \r , 0x0D in hexadecimal, 13 in decimal) 
		if (evt->data.rx.buf[buf2->len - 1] == 0x0D) {
			blink(LED4,3);
            uart_rx_disable(uart_2);
			disable_req = true;
		}
      	break;

	case UART_RX_DISABLED:
	    disable_req = false;
		blink(LED3,5);
        
		buf2 = k_malloc(sizeof(*buf2)); //THE SIZE IS 92 BYTES
		if (buf2) {
			buf2->len = 0;
		} else {
			
			k_work_reschedule(&uart_work_2, UART_WAIT_FOR_BUF_DELAY);
			return;
		}
        
        buf2->len = 0;
  		uart_rx_enable(uart_2, buf2->data, sizeof(buf2->data),UART_WAIT_FOR_RX);
		break;
   
	case UART_RX_BUF_RELEASED:
	    buf2 = CONTAINER_OF(evt->data.rx_buf.buf, struct uart_data_t,data);
		if (buf2->len > 0){
		   k_fifo_put(&fifo_uart2_rx_data, buf2);
		   blink(LED4,6);
		   k_free(buf2);
		}
		break;
	}

    
   
}

k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12086
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12087
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12088
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12089
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12090
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12091
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12092
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12093
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12094
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12095
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12096
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12097
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12098
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12099
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12100
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12101
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12102
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12103
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12104
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12105
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12106
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12107
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12108
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12109
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12110
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12111
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12112
k:40 UART2:30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 30 31 32 33 34 35 36 37 38 39 j:12113

I tested for 12117 times without failure.

The full code it's here

RE: k_work_reschedule failed after 53 interacts

FlavioPiracicaba — Sat, 08 Apr 2023 22:13:33 GMT

on line 123: k_work_reschedule(&uart_work, UART_WAIT_FOR_BUF_DELAY); there is a mistake should be &uart_work_2. The problem continue. The k_free() never is called.

RE: k_work_reschedule failed after 53 interacts

FlavioPiracicaba — Fri, 07 Apr 2023 09:46:20 GMT