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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Add initialization sequence to SPIM interface</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/99231/add-initialization-sequence-to-spim-interface</link><description>I am developing for NRF52840 on a custom board (SDK 15.0, Segger), and working on integration with a HTRC110 RFID HITAG reader chip. This chip supports 3-wire SPI, for which I&amp;#39;m using the NRFX_SPIM driver. I am able to get the driver to transmit bytes</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 04 May 2023 07:28:44 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/99231/add-initialization-sequence-to-spim-interface" /><item><title>RE: Add initialization sequence to SPIM interface</title><link>https://devzone.nordicsemi.com/thread/423679?ContentTypeID=1</link><pubDate>Thu, 04 May 2023 07:28:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:05a7cd7a-1f58-474b-bd5d-39e97505efa2</guid><dc:creator>haakonsh</dc:creator><description>[quote user="kfxkaplan"]This did the trick, thank you so much for your help![/quote]
&lt;p&gt;I&amp;#39;m glad to hear&amp;nbsp;it worked out, let me know if you do find any issues.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;One scenario you might want to be aware of is if an ISR executes&amp;nbsp;between sending the start-condition and triggering the SPIM start task, then you will likely experience similar issues as before.&amp;nbsp;You should therefore&amp;nbsp;make your application tolerant to this SPI fault.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Add initialization sequence to SPIM interface</title><link>https://devzone.nordicsemi.com/thread/423604?ContentTypeID=1</link><pubDate>Wed, 03 May 2023 14:47:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:919cd3b0-aa70-464a-abc7-9e517b2c6bc1</guid><dc:creator>kfxkaplan</dc:creator><description>&lt;p&gt;This did the trick, thank you so much for your help!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Add initialization sequence to SPIM interface</title><link>https://devzone.nordicsemi.com/thread/423464?ContentTypeID=1</link><pubDate>Wed, 03 May 2023 08:36:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c71511f5-68a2-4e77-90f5-ad50b03004b3</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;SCK and MOSI will return to their last configured state when the SPIM peripheral is disabled, that might be what&amp;#39;s happening.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Try calling nrf_gpio_pin_clr(RFID_SPI_SCK_PIN) and&amp;nbsp;nrf_gpio_pin_clr(RFID_SPI_MOSI_PIN),&amp;nbsp;after you&amp;#39;ve enabled the SPIM. The pins should not immidiately change state as the GPIO peripheral is overridden by the SPIM peripheral, for as long as the SPIM peripheral is enabled.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Add initialization sequence to SPIM interface</title><link>https://devzone.nordicsemi.com/thread/423382?ContentTypeID=1</link><pubDate>Tue, 02 May 2023 17:59:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:36e1bba1-984d-445d-a548-282f28c70825</guid><dc:creator>kfxkaplan</dc:creator><description>&lt;p&gt;Thanks for the feedback haakonsh! I implemented the steps as follows&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;    nrfx_spim_xfer_desc_t xfer_desc = NRFX_SPIM_XFER_TX(&amp;amp;cmd_byte, sizeof(cmd_byte));    
    nrfx_spim_xfer(spi_inst, p_xfer_desc, NRFX_SPIM_FLAG_HOLD_XFER);
    task = nrfx_spim_start_task_get(spi_inst);
    nrf_spim_disable(spi_inst-&amp;gt;p_reg);
    nrf_gpio_pin_set(RFID_SPI_SCK_PIN);
    nrf_delay_us(1);
    nrf_gpio_pin_set(RFID_SPI_MOSI_PIN);
    nrf_spim_enable(spi_inst-&amp;gt;p_reg);
    nrf_spim_task_trigger(spi_inst-&amp;gt;p_reg, task);&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;I tried this with and without the&amp;nbsp;nrf_delay_us call. Initially, the waveform would look fine, like below.&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1683050105568v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;However,&amp;nbsp;by the second or third spim operation the waveform would look like the following, with both MOSI and SCLK going high nearly simultaneously.&lt;/p&gt;
&lt;p&gt;&lt;img src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1683049778124v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;This occurred both with and without the&amp;nbsp;nrf_delay_us call between clearing the 2 pins.&lt;/p&gt;
&lt;p&gt;Should I be disabling the spim driver again after the transfer and clearing both pins manually, or is something off with my implementation?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Add initialization sequence to SPIM interface</title><link>https://devzone.nordicsemi.com/thread/423218?ContentTypeID=1</link><pubDate>Tue, 02 May 2023 09:13:26 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1552c851-3a46-4b41-8d70-1a6f9b0cf311</guid><dc:creator>haakonsh</dc:creator><description>&lt;p&gt;Try&amp;nbsp;this:&lt;/p&gt;
&lt;p&gt;Set up a transfer with the&amp;nbsp;&lt;a title="NRFX_SPIM_FLAG_HOLD_XFER" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.1.0/group__nrfx__spim.html?cp=9_1_6_8_0_32_0_7#gaff6489390a782991804a0da7215385c4"&gt;NRFX_SPIM_FLAG_HOLD_XFER&lt;/a&gt;&amp;nbsp;flag --&amp;gt; disable(not uninitialize) the SPIM peripheral --&amp;gt; set start conditions manually (CPU toggling of CLK and MOSI pins) --&amp;gt; enable SPIM periheral&amp;nbsp;--&amp;gt; start SPIM transfer.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;See the following API docs:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a title="nrfx_spim_xfer" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.1.0/group__nrfx__spim.html?cp=9_1_6_8_0_32_0_25#gae4b5f522da698ed536ce915ede1216ac"&gt;nrfx_spim_xfer&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a title="nrf_spim_disable" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.1.0/group__nrf__spim__hal.html?cp=9_1_6_8_0_32_1_15#ga133219ddae2b49690067a41f66fd2a19"&gt;nrf_spim_disable&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a title="nrf_spim_enable" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.1.0/group__nrf__spim__hal.html?cp=9_1_6_8_0_32_1_16#ga6231f7b9cf9cfec6ece8b0b225e2ce88"&gt;nrf_spim_enable&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a title="nrf_spim_task_trigger" href="https://infocenter.nordicsemi.com/topic/sdk_nrf5_v17.1.0/group__nrf__spim__hal.html?cp=9_1_6_8_0_32_1_42#ga0cdda90315198f6ac2a809f7bd4892d9"&gt;nrf_spim_task_trigger&lt;/a&gt;(&lt;em&gt;NRF_SPIM_TASK_START&lt;/em&gt;)&lt;/li&gt;
&lt;/ul&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>