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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>PPI lpcomp and GPIO</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/99758/ppi-lpcomp-and-gpio</link><description>I am still far from comfortable with NRF Connect SDK, not so easy for an old-school programmer to get used to. 
 I am trying to configure LPCOMP so it will have input from PIN0.29, and when output is change, it will be reflected to PIN0.28. 
 Using PPI</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 17 May 2023 05:28:21 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/99758/ppi-lpcomp-and-gpio" /><item><title>RE: PPI lpcomp and GPIO</title><link>https://devzone.nordicsemi.com/thread/426029?ContentTypeID=1</link><pubDate>Wed, 17 May 2023 05:28:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:803faf19-0e03-47e1-887b-8a67ef082578</guid><dc:creator>Johan.h</dc:creator><description>&lt;p&gt;I totally agree with you, that&amp;#39;s why I tried to use the driver API.&amp;nbsp;Got too many errors due to my lake of understanding and gave up. As for now, it looks that I need a quick (and dirty) solution. Telling myself that one day I&amp;#39;ll get back to it and do it &amp;quot;properly&amp;quot; (a fairy tell).&lt;/p&gt;
&lt;p&gt;However, if you have the time to &amp;#39;translate&amp;#39;&amp;nbsp;my code to API, I will be happy to learn and implement.&lt;/p&gt;
&lt;p&gt;if you don&amp;#39;t have the time, then consider this as resolved.&lt;/p&gt;
&lt;p&gt;BR&lt;/p&gt;
&lt;p&gt;Johanan&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI lpcomp and GPIO</title><link>https://devzone.nordicsemi.com/thread/425836?ContentTypeID=1</link><pubDate>Tue, 16 May 2023 11:28:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:60a13ca8-d8cd-4b5a-9105-b3d05ecb0c73</guid><dc:creator>Hieu</dc:creator><description>&lt;p&gt;It&amp;#39;s great that you got it to work. I am honestly not familiar with the LPCOMP peripheral, so I cannot comment about that part of your code. However, the GPIOTE and the PPI parts look fine.&lt;/p&gt;
&lt;p&gt;As you are using the direct register approach, please remember that you will need to keep track of PPI and GPIOTE channel usage on your own, not only for this part of the code, but also for all&amp;nbsp;other features that use PPI and GPIOTE channels. The nrfx Driver will have no way to know that you directly allocate certain channels for specific part.&lt;/p&gt;
&lt;p&gt;The last thing to keep in mind is pin ownership. Please make sure that the pins you use here are not used by any other device in &lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.3.0/zephyr/build/dts/index.html"&gt;the Devicetree&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;Shall we consider your question resolved then?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI lpcomp and GPIO</title><link>https://devzone.nordicsemi.com/thread/425832?ContentTypeID=1</link><pubDate>Tue, 16 May 2023 10:56:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fc6bc7f8-2613-4e86-906d-387fa5050081</guid><dc:creator>Johan.h</dc:creator><description>&lt;p&gt;Well, after spending some time with trying to understand Driver API, I decided to just program the registers the old way, for me it looks the easiest&amp;nbsp; and fastest. I need the GPIO pin to be inverted of the lpCOMP out, so this is what I did (and it works):&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;void working_1()
{
	// Configure GPIO
	nrf_gpio_cfg_input(NRF_GPIO_PIN_MAP(0, 29), NRF_GPIO_PIN_NOPULL); 
	nrf_gpio_pin_dir_set(NRF_GPIO_PIN_MAP(0, 28), NRF_GPIO_PIN_DIR_OUTPUT);
	/* Configure LPCOMP */
	
  // Set the reference voltage and detection (adjust these settings as needed)
	NRF_LPCOMP-&amp;gt;REFSEL = (NRF_LPCOMP_REF_SUPPLY_4_8 &amp;lt;&amp;lt; LPCOMP_REFSEL_REFSEL_Pos); // Reference 4/8 supply volts
	NRF_LPCOMP-&amp;gt;ANADETECT = (LPCOMP_ANADETECT_ANADETECT_Cross &amp;lt;&amp;lt; LPCOMP_ANADETECT_ANADETECT_Pos); // Detect cross

	// Enable hysteresis
	NRF_LPCOMP-&amp;gt;HYST = (NRF_LPCOMP_HYST_ENABLED &amp;lt;&amp;lt; LPCOMP_HYST_HYST_Pos);

	// Set the input source for the LPCOMP
	NRF_LPCOMP-&amp;gt;PSEL = (29 &amp;lt;&amp;lt; LPCOMP_PSEL_PSEL_Pos); // Use P0.29 as input 

	// Enable and start the LPCOMP
	NRF_LPCOMP-&amp;gt;ENABLE = (LPCOMP_ENABLE_ENABLE_Enabled &amp;lt;&amp;lt; LPCOMP_ENABLE_ENABLE_Pos); 
	NRF_LPCOMP-&amp;gt;TASKS_START = 1;

    // Configure the first PPI channel for LPCOMP Down event
	NRF_PPI-&amp;gt;CH[0].EEP = (uint32_t)&amp;amp;(NRF_LPCOMP-&amp;gt;EVENTS_DOWN);
	NRF_PPI-&amp;gt;CH[0].TEP = (uint32_t)&amp;amp;(NRF_GPIOTE-&amp;gt;TASKS_SET[0]);

	// Configure the second PPI channel for LPCOMP Up event
	NRF_PPI-&amp;gt;CH[1].EEP = (uint32_t)&amp;amp;(NRF_LPCOMP-&amp;gt;EVENTS_UP);
	NRF_PPI-&amp;gt;CH[1].TEP = (uint32_t)&amp;amp;(NRF_GPIOTE-&amp;gt;TASKS_CLR[0]);

	// Configure the GPIOTE channel to set the pin
	NRF_GPIOTE-&amp;gt;CONFIG[0] = (GPIOTE_CONFIG_MODE_Task &amp;lt;&amp;lt; GPIOTE_CONFIG_MODE_Pos) |
	                        (28 &amp;lt;&amp;lt; GPIOTE_CONFIG_PSEL_Pos) |
	                        (GPIOTE_CONFIG_POLARITY_None &amp;lt;&amp;lt; GPIOTE_CONFIG_POLARITY_Pos) |
	                        (GPIOTE_CONFIG_OUTINIT_Low &amp;lt;&amp;lt; GPIOTE_CONFIG_OUTINIT_Pos); // Init to Low

	// Enable the PPI channels
	NRF_PPI-&amp;gt;CHENSET = (PPI_CHEN_CH0_Enabled &amp;lt;&amp;lt; PPI_CHEN_CH0_Pos) | (PPI_CHEN_CH1_Enabled &amp;lt;&amp;lt; PPI_CHEN_CH1_Pos);

}&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI lpcomp and GPIO</title><link>https://devzone.nordicsemi.com/thread/425822?ContentTypeID=1</link><pubDate>Tue, 16 May 2023 10:32:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8941b475-b2bb-4878-9769-c79682423d0e</guid><dc:creator>Hieu</dc:creator><description>&lt;p&gt;Hi Johanan,&lt;/p&gt;
&lt;p&gt;Luckily the &lt;span style="font-family:&amp;#39;courier new&amp;#39;, courier;"&gt;nrfx&lt;/span&gt; drivers&amp;nbsp;are developed in quite the old school fashion, so perhaps&amp;nbsp;setting up PPI will be more up your alley than the rest of the nRF Connect SDK/Zephyr experience.&lt;/p&gt;
&lt;p&gt;It is not for LPCOMP, but I recently wrote some sample code for setting up PPI to&amp;nbsp;connect RADIO events to GPIOTE tasks here. I wrote the code in&amp;nbsp;two ways, one using direct register access, and one using the nrfx Driver APIs. Would you like to take a look at it, and see if you can infer the solution for LPCOMP for yourself? I would be happy to support further if something is still not working out.&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/support-private/support/306657#permalink=855794"&gt;https://devzone.nordicsemi.com/support-private/support/306657#permalink=855794&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;By the way, I see that you are controlling the LPCOMP using the &lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrfx/drivers/lpcomp/hal.html"&gt;nrfx LPCOMP HAL APIs&lt;/a&gt;. There is nothing wrong with that, if you know what you are doing. However, have you considered the &lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrfx/drivers/lpcomp/driver.html"&gt;nrfx LPCOMP Driver APIs&lt;/a&gt;&amp;nbsp;instead?&lt;/p&gt;
&lt;p&gt;By the way, I will be out of office and return next Wednesday, May 24. Please excuse some delay in further responses due to this. My apology for the inconvenience.&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Hieu&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>