nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Susheel Nuguru — Wed, 24 May 2023 18:30:36 GMT

Great, Please let me know if this helps.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Wed, 24 May 2023 17:45:38 GMT

Thank you Susheel. I will forward this to our HW engineer.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Susheel Nuguru — Tue, 23 May 2023 19:05:03 GMT

Yaakov,

One of my colleague saw some issue with RESETREAS when the reset is caused by too much decoupling on VDD (i.e. to much cap. load) which caused REG0 to become unstable that again led to POR. This POR bit seems to be not registered for some reason. Can you double check your schematics (or upload them here so that we can review them) to see if this is behavior is relevant to you.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Susheel Nuguru — Tue, 23 May 2023 18:33:29 GMT

Reset reason cannot be 0, unless you have a bootloader that is booting before your application does and that bootloader is clearing the reset reason.

[quote user="kobyatom"]so maybe there is a power drop issue on my circuit, due to some contention on the SPI + CS lines[/quote]

Even so you should be able to see the reset as a brownout reset in the register. It cannot read 0 unless some module cleared the register in the firmware

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Tue, 23 May 2023 07:22:01 GMT

anyway, reset_reas value is 0 on powerup...
so maybe there is a power drop issue on my circuit, due to some contention on the SPI + CS lines.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Tue, 23 May 2023 05:51:58 GMT

the SPI is read via APP_SCHED, not from the ISR.

I don't know how easy it will be to reproduce, since my ISR source is external - an Accelerometer that generates an interrupt every 16 samples (each 6 bytes long), with a sample rate of 3200 Hz (5 msec between interrupts).

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Tue, 23 May 2023 05:24:21 GMT

thanks, I will try

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Susheel Nuguru — Tue, 23 May 2023 05:22:18 GMT

I have never seen before that the reset reasons reads 0 before clearing up the register. Can you help me reproduce your error. Maybe give me a simplistic project where I can see the same reset and same reset reason 0 as you see (when the delay is not added)

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Tue, 23 May 2023 05:18:45 GMT

we carefully implemented this reset-reason feature a few months ago, and verified it to work with reset reasons SREQ and RESETPIN.

Here is the implementation:

We have a static member that gets the reset reason on init, from the RESETREAS reg

const uint32_t reset_reason = nrf_power_resetreas_get();    // Do before any other action https://devzone.nordicsemi.com/f/nordic-q-a/48446/how-to-detect-cause-of-reset

in main() we clear the resetreas register

nrf_power_resetreas_clear(NRF_POWER_RESETREAS_OFF_MASK);    // Clear this register, instead of the bootloader.

and later we print the previously saved reset reason

ATLOG_INFO("reset_reason 0x%08x", reset_reason);

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Susheel Nuguru — Tue, 23 May 2023 05:11:12 GMT

Are you executing the SPI read from the ISR? If so which interrupt priority is this?

[quote user="kobyatom"]

The reset reason is 0.

(The reset read operations shows 1 after I press the reset button, so I believe it is working properly.)

[/quote]

If you read the RESETREAS after the reset (do not read this register when you press the reset button, read after when the chip resets when you do not have delay added after nrf_gpio_pin_set) register.

This register cannot read 0 after the MCU reset, as there should be some reason registered why the chip was reset. If you are reading this register as value 0, then something is not correct in how you are reading this register.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Tue, 23 May 2023 04:55:53 GMT

I will check the trigger for the 96-byte SPI transaction. It should happen every 5 msec, trigger an ISR that starts the SPI transaction.

The SPI transaction should complete in 96 micro-seconds (8MHz clock), which is a lot quicker than the external ISR rate, but there might be delays in the execution that cause the SPI transaction to not complete in time for the next interrupt.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

kobyatom — Tue, 23 May 2023 03:32:15 GMT

it might not be known why, but it is what happens nonetheless. Adding a 1 microsecond delay between SPI transactions, after CS being set to inactive, right before the next transaction begins and CS is set to active again, avoids the reset.

The reset reason is 0.

(The reset read operations shows 1 after I press the reset button, so I believe it is working properly.)

The SPI configuration is:

        .conf =
        {
            .sck_pin = NRFX_SPIM_SCK_PIN,
            .mosi_pin = NRFX_SPIM_MOSI_PIN,
            .miso_pin = NRFX_SPIM_MISO_PIN,
            .ss_pin = NRFX_SPIM_PIN_NOT_USED,
            .ss_active_high = false,
            .irq_priority = NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY,
            .orc = 0xFF,
            .frequency = NRF_SPIM_FREQ_8M,
            .mode = NRF_SPIM_MODE_0,
            .bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST,
            NRFX_SPIM_DEFAULT_EXTENDED_CONFIG
        },

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Susheel Nuguru — Mon, 22 May 2023 18:59:46 GMT

I do not see how adding a delay after pin set avoids a reset. We first need to know the reset reason before we can try to understand the context of the reset. As discussed in this thread, try to see if you can read the reset reason register after the reset happens, so that we can debug this further.

If this turns out to be a soft-reset, this the application error handler could most likely be a reason. But at this point, we cannot debug this further without knowing the reason reason.

RE: nrf_gpio_pin_set causes random MCU resets during Manual-CS SPI transactions

Menon — Fri, 19 May 2023 11:36:47 GMT

Hello,
I am sorry, but we are short staffed this week due to Public Holidays in Norway. We will be back on Monday 22nd and hope to be able to answer all incoming requests within a couple of days, depending on the backlog. I am sorry for the inconvenience.

Best regards,
Abhijith